CD54HC165 Datasheet, PDF (1/13 Pages) Texas Instruments – High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

Data sheet acquired from Harris Semiconductor
SCHS156C
February 1998 - Revised October 2003
CD54HC165, CD74HC165,
CD54HCT165, CD74HCT165
High-Speed CMOS Logic
8-Bit Parallel-In/Serial-Out Shift Register
[ /Title
(CD74H
C165,
CD74H
CT165)
/Subject
(High
Speed
CMOS
Logic 8-
Bit Par-
allel-
Features
Description
• Buffered Inputs
• Asynchronous Parallel Load
• Complementary Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift
registers with complementary serial outputs (Q₇ and Q₇)
available from the last stage. When the parallel load (PL)
input is LOW, parallel data from the D0 to D7 inputs are
loaded into the register asynchronously. When the PL is
HIGH, data enters the register serially at the DS input and
shifts one place to the right (Q₀→Q₁→Q₂, etc.) with each
positive-going clock transition. This feature allows parallel-
to-serial converter expansion by typing the Q₇ output to the
DS input of the succeeding device.
For predictable operation the LOW-to-HIGH transition of CE
should only take place while CP is HIGH. Also, CP an d CE
should be LOW before the LOW-to-HIGH transition of PL to
prevent shifting the data when PL goes HIGH.
Ordering Information
PART NUMBER
CD54HC165F3A
CD54HCT165F3A
CD74HC165E
TEMP. RANGE
(^oC)
PACKAGE
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld PDIP
Pinout
CD54HC165, CD54HCT165
(CERDIP)
CD74HC165, CD74HCT165
(PDIP, SOIC)
TOP VIEW
PL 1
CP 2
D4 3
D5 4
D6 5
D7 6
Q₇ 7
GND 8
16 V_CC
15 CE
14 D3
13 D2
12 D1
11 D0
10 DS
9 Q₇
CD74HC165M
-55 to 125
16 Ld SOIC
CD74HC165MT
-55 to 125
16 Ld SOIC
CD54HC165M96
-55 to 125
16 Ld SOIC
CD74HCT165E
-55 to 125
16 Ld PDIP
CD74HCT165M
-55 to 125
16 Ld SOIC
CD74HCT165MT
-55 to 125
16 Ld SOIC
CD54HCT165M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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