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BQ4847 Datasheet, PDF (1/5 Pages) Texas Instruments – RTC Module With CPU Supervisor
bq4847/bq4847Y
RTC Module With CPU Supervisor
Features
® Real-Time Clock counts seconds
through years in BCD format
® Integrated battery and crystal
® On-chip battery-backup switch-
over circuit with nonvolatile con-
trol for an external SRAM
® 130mAh battery capacity
® ± 1 minute per month clock accu-
racy
® Less than 500nA of clock opera-
tion current in backup mode
® Microprocessor reset valid to
VCC = VSS
® Independent watchdog timer
with a programmable time-out
period
® Power-fail interrupt warning
® Programmable clock alarm inter-
rupt active in battery-backup
mode
® Programmable periodic interrupt
® Battery-low warning
General Description
The bq4847 Real-Time Clock Mod-
ule is a low-power microprocessor
peripheral that integrates a time-
of-day clock, a 100-year calendar, a
CPU supervisor, a battery, and a crys-
tal in a 28-pin DIP module. The part
is ideal for fax machines, copiers, in-
dustrial control systems, point-of-sale
terminals, data loggers, and comput-
ers.
The bq4847 contains an internal
battery and crystal. Through the use
of the conditional chip enable output
(CEOUT) and battery voltage output
(VOUT) pins, the bq4847 can write-
protect and make nonvolatile an
external SRAM. The backup cell
powers the real-time clock and
maintains SRAM information in
the absence of system voltage.
The bq4847 contains a
temperature-compensated refer-
ence and comparator circuit that
monitors the status of its voltage
supply. When an out-of-tolerance
condition is detected, the bq4847
generates an interrupt warning
and subsequently a microproces-
sor reset. The reset stays active
for 200ms after VCC rises within
tolerance to allow for power supply
and processor stabilization.
The bq4847 also has a built-in
watchdog timer to monitor processor
operation. If the microprocessor does
not toggle the watchdog input (WDI)
within the programmed time-out,
the bq4847 asserts WDO and RST.
WDI unconnected disables the
watchdog timer.
The bq4847 can generate other in-
terrupts based on a clock alarm con-
dition or a periodic setting. The
alarm interrupt can be set to occur
from once per second to once per
month. The alarm can be made ac-
tive in the battery-backup mode to
serve as a system wake-up call. For
interrupts at a rate beyond once per
second, the periodic interrupt can be
programmed with periods of 30.5µs
to 500ms.
Caution:
Take care to avoid inadvertent dis-
charge through VOUT and CEOUT
after battery isolation has been
broken.
Pin Connections
Pin Names
VOUT 1
NC 2
NC 3
WDO 4
INT 5
RST 6
A3 7
A2 8
A1 9
A0 10
DQ0 11
DQ1 12
DQ2 13
VSS 14
28 VCC
27 WE
26 CEIN
25 CEOUT
24 NC
23 WDI
22 OE
21 CS
20 NC
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
28-Pin DIP Module
PN484701.eps
Sept. 1996
A0–A3
Clock/Control address
inputs
DQ0–DQ7 Data inputs/outputs
WE
Write enable
OE
Output enable
CS
Chip select input
CEIN
External RAM chip
enable
CEOUT
Conditional RAM chip
enable
NC
VOUT
INT
RST
WDI
WDO
VCC
VSS
No connect
Back-up battery output
Interrupt output
Microprocessor reset
Watchdog input
Watchdog output
+5V supply
Ground
1