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74ACT11132 Datasheet, PDF (1/5 Pages) Texas Instruments – QUADRUPLE POSITIVE-NAND GATE WITH SCHMITT-TRIGGER INPUTS
• Inputs Are TTL-Voltage Compatible
• Center-Pin VCC and GND Pin Configurations
Minimize High-Speed Switching Noise
• EPIC™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
74ACT11132
QUADRUPLE POSITIVE-NAND GATE
WITH SCHMITT-TRIGGER INPUTS
SCAS177 – D3974, JANUARY 1992 – REVISED APRIL 1993
D OR N PACKAGE
(TOP VIEW)
1A 1
1Y 2
2Y 3
GND 4
GND 5
3Y 6
4Y 7
4B 8
16 1B
15 2A
14 2B
13 VCC
12 VCC
11 3A
10 3B
9 4A
This device contains four independent 2-input NAND gates with Schmitt-trigger inputs. Because of the Schmitt
action, they have different input threshold levels for positive- and negative-going signals. Each gate performs
the Boolean function Y = A•B or Y = A+B in positive logic.
The 74ACT11132 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
INPUTS
A
B
OUTPUT
Y
H
H
L
L
X
H
X
L
H
logic symbol†
1
1A
&
16
1B
15
2A
14
2B
11
3A
10
3B
9
4A
8
4B
2
1Y
3
2Y
6
3Y
7
4Y
logic diagram (positive logic)
1
1A
16
1B
15
2A
14
2B
11
3A
10
3B
9
4A
8
4B
2 1Y
3 2Y
6 3Y
7 4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1993, Texas Instruments Incorporated
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