74ACT11032DRG4 Datasheet, PDF (1/14 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-OR GATES

74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES
D Inputs Are TTL-Voltage Compatible
D Center-Pin V_CC and GND Configurations to
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at 125°C
D Package Options Include Plastic
Small-Outline Packages (D), Plastic Shrink
Small-Outline Packages (DB), Plastic Thin
Shrink Small-Outline Packages (PW), and
Standard Plastic 300-mil DIPs (N)
SCAS008C – JULY 1987 – REVISED APRIL 1996
D, DB, N, OR PW PACKAGE
(TOP VIEW)
1A ₁
1Y ₂
2Y ₃
GND ₄
GND 5
3Y 6
4Y 7
4B 8
16 ^1B
15 ^2A
14 ^2B
13 ^V_CC
12 V_CC
11 3A
10 3B
9 4A
description
This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or
+Y A • B in positive logic.
The 74ACT11032 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
H
X
X
H
L
L
OUTPUT
Y
H
H
L
logic symbol^†
1
1A
16
1B
15
2A
14
2B
11
3A
10
3B
9
4A
8
4B
≥
2
1Y
3
2Y
6
3Y
7
4Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984}
and IEC Publication 617-12.
logic diagram (positive logic)
1A
1Y
1B
2A
2Y
2B
3A
3Y
3B
4A
4Y
4B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1