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54ACT11253 Datasheet, PDF (1/5 Pages) Texas Instruments – DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
54ACT11253, 74ACT11253
DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SCAS040A – D3110, MARCH 1988 – REVISED APRIL 1993
• Inputs Are TTL-Voltage Compatible
• 3-State Version of ′ACT11153
• Permits Multiplexing From N Lines to
One Line
• Performs Parallel-to-Serial Conversion
• Package Options Include Plastic Small-
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
t • EPIC (Enhanced-Performance Implanted
CMOS) 1-mm Process
54ACT11253 . . . J PACKAGE
74ACT11253 . . . D OR N PACKAGE
(TOP VIEW)
A1
B2
1Y 3
GND 4
2Y 5
1G 6
2G 7
2C3 8
16 1C0
15 1C1
14 1C2
13 1C3
12 VCC
11 2C0
10 2C1
9 2C2
54ACT11253 . . . FK PACKAGE
(TOP VIEW)
description
Each of these data selectors/multiplexers
contains inverters and drivers to supply full binary
decoding data selection to the AND-OR gates.
Separate output control inputs are provided for
each of the two four-line sections.
The 3-state outputs can interface with and drive
data lines of bus-organized systems. With all but
one of the common outputs disabled (at a
high-impedance state), the low-impedance of
the single enabled output will drive the bus line
to a high or low logic level. Each output has
its own strobe (G). The outputs are disabled when
G is high.
The 54ACT11253 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74ACT11253 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
SELECT
INPUTS
BA
DATA INPUTS
C0 C1 C2 C3
OUTPUT
CONTROL
G
OUTPUT
Y
XXXXXX
H
Z
L L LXXX
L
L
L LHXXX
L
H
L HX L XX
L
L
LHXHXX
L
H
HLXXLX
L
L
H L XXHX
L
H
HHXXX L
L
L
HHXXXH
L
H
Address inputs A and B are common to both sections.
1C1
1C0
NC
A
B
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2C1
2C2
NC
2C3
2G
NC – No internal connection
logic symbol†
1
A
2
B
0
1
G
0
3
6
1G
16
1C0
15
1C1
14
1C2
13
1C3
7
2G
11
2C0
10
2C1
9
2C2
8
2C3
MUX
EN
0
1
2
3
3
1Y
5
2Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1993, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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