54ACT11021 Datasheet, PDF (1/5 Pages) Texas Instruments – DUAL 4-INPUT POSITIVE-AND GATES

• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V_CC and GND Configurations
Minimize High-Speed Switching Noise
• EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Small-
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
description
These devices contain two independent 4-input
AND gates. They perform the Boolean functions
Y = ASBSCSD or Y = A + B + C + D in positive logic.
The 54ACT11021 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74ACT11021 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A
B
C
D
Y
H
H
H
H
H
L
X
X
X
L
X
L
X
X
L
X
X
L
X
L
X
X
X
L
L
logic symbol^†
1A ²
&
1B ¹
1C ¹³
1D ¹²
2A ¹⁰
2B ⁹
2C ⁷
2D ⁶
3 _1Y
5 _2Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984}
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
54ACT11021, 74ACT11021
DUAL 4-INPUT POSITIVE-AND GATES
SCAS012B – D2957, JULY 1987 – REVISED APRIL 1993
54ACT11021 . . . J PACKAGE
74ACT11021 . . . D OR N PACKAGE
(TOP VIEW)
1B ₁
1A 2
1Y 3
GND 4
2Y 5
2D 6
2C 7
14 NC
13 1C
12 1D
11 V_CC
10 2A
9 2B
8 NC
54ACT11021 . . . FK PACKAGE
(TOP VIEW)
NC
3 2 1 20 19
4
18
2B
NC ₅
17 ^NC
1B 6
16 NC
NC 7
15 NC
1A 8
14 2C
9 10 11 12 13
NC – No internal connection
logic diagram (positive logic)
1A
1B
1Y
1C
1D
2A
2B
2Y
2C
2D
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
Copyright © 1993, Texas Instruments Incorporated
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