THV6531 Datasheet, PDF (7/11 Pages) THine Electronics, Inc. – THV6531 is a controller IC power supply system with

THL6531_Rev.1.01_E
determined by the output capacitor total capacitance,
C_OUT, and the output
VLS_rip  ^{D  IOUT}  I _peak  ESR
F_OSC  C_OUT
I _peak  I _IN  ^{I rip}
2
The first ripple component can be reduced by increasing
C_OUT since F_OSC is fixed 1.2MHz(typ). Changing C_OUT
may require adjustment of compensation R and C in
order to provide adequate phase margin and loop
bandwidth.
The second ripple component can be reduced by
selecting low-ESR ceramic capacitors and using several
smaller capacitors in parallel instead of just one large
capacitor.
[Inductor selection]
To prevent magnetic saturation of the inductor core the
inductor has to be rated for a maximum current larger
than I_PK in a given application. Since the chip provides
current limit protection of 3A, it is generally
recommended that the inductor be rated at least for 3A.
Selection of the inductor requires trade-off between the
physical size (footprint x height) and its electrical
properties (current rating, inductance, resistance). Within
a given footprint and height, an inductor with larger
inductance typically comes with lower current rating and
often larger series resistance. Larger inductance typically
requires more turns on the winding, a smaller core gap or
a core material with a larger relative permeability. An
inductor with a larger physical size has better electrical
properties than a smaller inductor.
It is desirable to reduce the ripple current ΔI_rip in order to
reduce voltage noise on the input and output capacitors.
In practice, the inductor is often much larger than the
capacitors and it is easier and cheaper to increase the size
of the capacitors. The ripple current ΔI_rip is then chosen
the largest possible while at the same time not degrading
the maximum input and output current that the converter
can operate with before reaching the current limit of the
chip or the rated current of the inductor.
I _peak  I _IN  ^{I rip}  I _MAX
2
For example, ΔI_rip could be set to 20% of I_MAX
Voltage detector circuit
During power-up, once VIN exceeds V_UVLO, the
controller initiates a 163ms blanking period during which
the input voltage at DIN is ignored and the DOUT pin is
floated to high impedance. An external pull up resistor
should pull DOUT high. After this blanking period, the
DIN function is enabled, with DOUT driven low if DIN
falls below V_DIN, or floated high if DIN rises above V_DIN.
To the external voltage V_ext, the rising and falling
detection thresholds V_DET,High and V_DET,Low, respectively
are set by the external voltage divider R3, R4.
V_Det,High  ^{R4  R3} (V_Din  V_Din )
R₃
V_Det,Low

R₄  R₃
R₃
V_Din
VIN
R3
DIN
R4
Fig. 2 Detector setup
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THine Electronics, Inc.
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