THC63LVDM83D_16 Datasheet, PDF (2/18 Pages) THine Electronics, Inc. – 24bit COLOR LVDS TRANSMITTER

THC63LVDM83D_Rev.4.20_E
THC63LVDM83D
24bit COLOR LVDS TRANSMITTER
General Description
The THC63LVDM83D transmitter is designed to support pixel
data transmission between Host and Flat Panel Display up to
1080p/WUXGA resolutions.
The THC63LVDM83D converts 28bits of LVCMOS data into
four LVDS data streams. The transmitter can be programmed
for rising edge or falling edge clock through a dedicated pin.
At a transmit clock frequency of 160MHz, 24bits of RGB data
and 4bits of timing and control data (HSYNC, VSYNC, DE,
CONT1) are transmitted at an effective rate of 1120Mbps per
LVDS channel.
Application
Medium and Small Size Panel
Tablet PC / Notebook PC
Security Camera / Industrial Camera
Multi Function Printer
Industrial Equipment
Medical Equipment Monitor
Features
Compatible with TIA/EIA-644 LVDS Standard
7:1 LVDS Transmitter
Operating Temperature Range : 0 to +70 C
No Special Start-up Sequence Required
Spread Spectrum Clocking Tolerant up to 100kHz Frequency
Modulation and +/-2.5% Deviations.
Wide Dot Clock Range: 8 to 160MHz Suited for
TV Signal : NTSC(12.27MHz) - 1080p(148.5MHz)
PC Signal : QVGA(8MHz) - WUXGA(154MHz)
56pin TSSOP Package
1.2V to 3.3V LVCMOS/ inputs are supported.
LVDS swing is reducible as 200mV by RS-pin to reduce EMI
and power consumption.
PLL requires no external components.
Power Down Mode.
Input clock triggering edge is selectable by R/F-pin
EU RoHS Compliant.
Block Diagram
CMOS/TTL
INPUTS
TA0-6
7
TB0-6
7
TC0-6
7
TD0-6
7
TRANSMITTER
CLKIN
(8 to 160MHz)
R/F
/PDWN
RS
THC63LVDM83D
PLL
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
TD +/-
(56-1120Mbit/On Each
LVDS Channel)
TCLK +/-
CLOCK
(LVDS)
8-160MHz
Figure 1. Block Diagram
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