THC63LVDF84C Datasheet, PDF (11/14 Pages) THine Electronics, Inc. – 24bit Color LVDS Receiver (Falling Edge Strobe Output)

THSP-DS-128-50-E
Input to Output Delay
RCLK+
Vdiff = 0V
tRCD
CLKOUT
Note:Vdiff=(RCLK+)-(RCLK-)
VCC/2
Figure 10.Input Clock to Output Clock Delay Time
Phase Lock Loop Set Time
3.0V
VCC33
RCLK+/-
/PDWN
CLKOUT
VCC/2
t_RPLL
VCC/2
Figure 11. PLL Lock Loop Set Time
Product Specifications(THC63LVDF84C_Rev.1.20_E)
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THSP-DS-Format_Rev.1.1.1_E