THC63LVD104C_15 Datasheet, PDF (10/14 Pages) THine Electronics, Inc. – 112MHz 30Bits COLOR LVDS Receiver

THC63LVD104C_Rev.2.1_E
AC Timing Diagrams
Phase Lock Loop Set Time
3.0V
VCC
RCLK+/-
PD
CLKOUT
RCLK +/- to CLKOUT Delay
RCLK+
V_diff=0V
Ry+/-
y = A,B,C,D,E
Current Data
t_RCD
CLKOUT
R/F = L
Rxn
x = A,B,C,D,E
n = 0,1,2,3,4,5,6
2.0V
t_RPLL
2.0V
Note:
1)V_diff = (RCLK+) - (RCLK-)
VCC/2
Current Data
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THine Electronics, Inc.