U211B2 Datasheet, PDF (6/20 Pages) TEMIC Semiconductors – Phase Control Circuit - General Purpose Feedback

U211B2/ B3
Design Hints
Practical trials are normally needed for the exact
determination of the values of the relevant components in
the load limiting. To make this evaluation easier, the
following table shows the effect of the circuitry on the
important parameters of the load limiting and summarises
the general tendencies.
Parameters
P_max
P_min
P_max / _min
t_d
t_r
R₁₀
increases
increases
increases
n.e.
n.e.
P_max – maximum continuous power dissipation
P_min – power dissipation with no rotation
t_d – operation delay time
t_r – recovery time
n.e – no effect
Component affected
R₉
decreases
decreases
n.e.
decreases
increases
0 P₁ = f_(n) n 0
P₁ = f_(n) n = 0
C₉
n.e.
n.e.
n.e.
increases
increases
Pulse Output Stage
The pulse output stage is short circuit protected and can
typically deliver currents of 125 mA. For the design of
smaller triggering currents, the function I_GT = f(R_GT) has
been given in the data sheets in the appendix.
Automatic Retriggering
The variable automatic retriggering prevents half cycles
without current flow, even if the triac is turned off earlier
e.g. due to a collector which is not exactly centered (brush
lifter) or in the event of unsuccessful triggering. If it is
necessary, another triggering pulse is generated after a
time lapse which is determined by the repetition rate set
by resistance between Pin 5 and Pin 3 (R_5-3). With the
maximum repetition rate (Pin 5 directly connected to
Pin 3), the next attempt to trigger comes after a pause of
4.5 t_p and this is repeated until either the triac fires or the
half-cycle finishes. If Pin 5 is connected, then only one
trigger pulse per half-cycle is generated. Because the
value of R_5-3 determines the charging current of C₂, any
repetition rate set using R_5-3 is only valid for a fixed value
of C₂.
General Hints and Explanation of Terms
To ensure safe and trouble-free operation, the following
points should be taken into consideration when circuits
are being constructed or in the design of printed circuit
boards.
– The connecting lines from C₂ to Pin 7 and Pin 2
should be as short as possible: The connection to Pin 2
should not carry any additional high current such as
the load current. When selecting C₂, a low
temperature coefficient is desirable.
– The common (earth) connections of the set-point
generator, the tacho-generator and the final
interference suppression capacitor C₄ of the f/V
converter should not carry load current.
– The tacho-generator should be mounted without
influence by strong stray fields from the motor.
– The connections from R₁₀ and C₅ should be as short
as possible.
To achieve a high noise immunity, a maximum ramp
voltage of 6 V should be used.
The typical resistance R_ö can be calculated from I_ö as
follows:
+ _ń R_ö (kW)
T(ms) 1.13(V) 10³
C nF) 6(V)
T = Period duration for mains frequency
(10 ms at 50 Hz)
C_ö = Ramp capacitor, max. ramp voltage 6 V
and constant voltage drop at R_ö = 1.13 V.
A 10% lower value of R_ö (under worst case conditions)
is recommended.
6 (20)
TELEFUNKEN Semiconductors
Rev. A1, 29-May-96