U2100B Datasheet, PDF (6/9 Pages) TEMIC Semiconductors – Timer Control for Triac and Relay

U2100B
Parameters
Test Conditions / Pins Symbol Min
Typ
Max
Unit
Synchronization
Pin 4
Input current
Voltage limitation
Rest phase angle
a_min-threshold
I₄ = ± 1 mA
ON
Off
± i_sync
0.1
1.1
mA
±V_sync
8.8
9.4
10
V
±V_T
3.6
4
4.4
V
±V_T
1.8
2
2.2
V
Zero-identification
Pin 4
Zero-identification
ON
OFF
±V_T
1.5
V
±I_T
8.5
mA
±V_T
4
V
±I_T
20
mA
Operation selection
Pin 4
Zero voltage switch
a_min-operation
±V_sync
V₄ limit
+V_sync
V₄ limit
V
–V_sync
6.5 to 7.8
DC mode
–V_sync
V₄ limit
V
+V_sync
6.5 to 7.8
Window monitoring figure 4
Pin 6
Threshold 1
Threshold 2
–V_I/V_Ref 0.52
0.49
0.46
–V_I/V_Ref 0.67
0.65
0.63
Enable-Schmitt trigger
Pin 5
Threshold 1
OFF
–V_I/V_Ref 0.33
0.3
0.27
Threshold 2
Oscillator
Threshold 1
ON
+f _1.6
1
R_t
C_t
–V_I/V_Ref 0.62
0.6
0.58
Pin 7 – 1
V_I/V_Ref
0.25
0.20
0.15
Threshold 2
Input current
Pin 7 – 8
V_I
Pin 7
I_I
100
200
mV
100
500
nA
Output stage limiter diode w.r.t. Pin 1
Pin 3
Saturation voltage
I₃ = 100 mA
V_3–2
2
V
Output current
I₃
100
mA
6 (9)
TELEFUNKEN Semiconductors
Rev. A1, 30-May-96