U209B3 Datasheet, PDF (4/14 Pages) TEMIC Semiconductors – Phase Control Circuit - Tacho Applications

TELEFUNKEN Semiconductors
U209B3/ U209B3–FP
V_C3
V₁
2
95 10272
V₀
t
t
1
t
2
t
3
t_tot
Figure 4. Soft–start
Frequency to Voltage Converter
The internal frequency to voltage converter
(f/V-converter) generates a DC signal on Pin 9 which is
proportional to the rotational speed using an AC signal
from a tacho–generator or a light beam whose frequency
is in turn dependent on the rotational speed. The high
impedance input with a switch–on threshold of typ. –
100 mV gives very reliable operation even when
relatively simple tacho–generators are employed. The
tacho-frequency is given by:
n
f=
p[Hz]
60
n = revolutions per minute
p = number of pulses per revolution
The converter is based on the charge pumping principle.
With each negative half wave of the input signal, a
quantity of charge determined by C₅ is internally
amplified and then integrated by C₆ at the converter
output on Pin 9. The conversion constant is determined
by C₅, its charging voltage of V_ch, R₆ (Pin 9) and the
internally adjusted charge amplification G_i.
k = G_i ^. C₅ ^. R₆ ^. V_ch
The analog output voltage is given by
V_o = k ^. f.
whereas: V_ch = 6.7 V
G_i = 8.3
The values of C₅ and C₆ must be such that for the highest
possible input frequency, the maximum output voltage
does V₀ does not exceed 6 V. While C₅ is charging up the
R_i on Pin 8 is approx. 6 kΩ. To obtain good linearity of the
f/V converter the time constant resulting from R_i and C₅
should be considerably less (1/5) than the time span of the
negative half cycle for the highest possible input
frequency. The amount of remaining ripple on the output
voltage on Pin 9 is dependent on C₅, C₆ and the internal
charge amplification.
∆V_o =
G_i ^. V_ch ^. C₅
C₆
The ripple ∆V_o can be reduced by using larger values of
C₆, however, the maximum conversion speed will than
also be reduced.
The value of this capacitor should be chosen to fit the
particular control loop where it is going to be used.
Control Amplifier
The integrated control amplifier with differential input
compares the set value (Pin 10) with the instantaneous
value on Pin 9 and generates a regulating voltage on the
output Pin 11 (together with external circuitry on Pin 12)
which always tries to hold the real voltage at the value of
the set voltages. The amplifier has a transmittance of typi-
cally 110 mA/V and a bipolar current source output on Pin
11 which operates with typically ±100 mA. The
amplification and frequency response are determined by
R₇, C₇, C₈ and R₈ (can be left out). For operation as a
power divider, C₄, C₅, R₆, C₆, R₇, C₇, C₈ and R₈ can be
left out. Pin 9 should be connected with Pin 11 and Pin 7
with Pin 2. The phase angle of the triggering pulse can be
adjusted using the voltage on Pin 10. An internal limiting
circuit prevents the voltage on Pin 11 from becoming
more negative than V₁₃ + 1 V.
Pulse Output Stage
The pulse output stage is short circuit protected and can
typically deliver currents of 125 mA. For the design of
smaller triggering currents, the function I_GT = f (R_GT) has
been given in the data sheets in the appendix.
Automatic Retriggering
The automatic retriggering prevents half cycles without
current flow, even if the triacs is turned off earlier e.g. due
to not exactly centred collector (brush lifter) or in the
event of unsuccessful triggering. If it is necessary, another
triggering pulse is generated after a time lapse of
t_PP = 4.5 t_P and this is repeated until either the triac fires
or the half cycle finishes.
Rev. A1: 01.09.1995
Preliminary Information
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