U2350B Datasheet, PDF (3/9 Pages) TEMIC Semiconductors – PWM Speed Control for Permanent Excited DC Motors

U2350B-FP
Pin Description
LED1 1
LED2 2
n.c. ₃
NTC ₄
Progr. 5
R_osc 6
C_{osc 7}
Contr. ₈
16 +V_S
15 OUT+
14 ^OUT
13 ^OUT–
12 GND
11 I_Contr.
10 ^S1
95 11409
9 ^VContr.
Pin Symbol
Function
1
LED1 LED output 1
2
LED2 LED output 2
3
n.c. Not connected
4
NTC Monitoring input
5
Progr. Tristate programing
6
R_osc Resistor for oscillator
7
C_osc Capacitor for oscillator
8
Contr. Control input
9
V_Contr. Voltage regulation input
10
S₁ Switching output, output S1
11
I_Contr. Current regulation input
12
GND Ground
13 OUT– – supply for output stage
14
OUT Output
15 OUT+ + supply for output stage
16
+V_S Supply voltage
Supply, Pin 16
Voltage Monitoring
The internal voltage limiter in the U2350B enables a
simple supply from the rectified line voltage. The supply
voltage between Pin 16 (+V_S) and Pin 12 (ground) is built
up via R₁ and is smoothed by C₇. The typically 5 mA
supply current is simultaneously used to operate the two
LEDs D₂, D₃, which can both be bridged internally. The
supply current therefore reaches Pin 16 either via LEDs
or the internal switches (V_sat ≤ 1.2 V).
Series resistor, R_1, can be calculated as follows:
+ R_1max
V_Mmin – V_Smax
I_tot
whereas
+ V_Mmin V_mains –15%
+ V_Smax maximum supply voltage
+ ) I_tot I_Smax I_x
+ I_Smax Max. current consumption of the IC
+I_x Current consumption of the external components
Here, C₆ must be selected in this way that the voltage at
C₇ (figure 2) is not noticeably affected by the load in any
mode of operation. For further information regarding
mains power supply, refer to figures 6 and 7.
Whilst the operating voltage is being built up or reduced,
uncontrolled output pulses of insufficient amplitude are
suppressed by the internal monitoring circuit. The latch
is also reset, the LED D₂ (operating indicator) between
Pin 2 and Pin 16 is switched off and the control input
W “Pin 8” is connected to ground via switch S₃ and a 1 k
resistor. In connection with a switching hysteresis of
approximately 2 V, this mode of operation guarantees
fail-safe start-up each time the operating voltage is
switched on, in the same way as after short mains
interruptions.
Connecting the control input Pin 8 with a capacitor can
therefore make a soft start with rapid recovery possible.
Pulse Width Control with Mains Voltage
Compensation, Pins 8, 9, 10
Average value of the voltage over the load is controlled
to an infinitely selectable value by the comparator
Comp. 1 with hysteresis. The rectified mains voltage is
divided by R₃ and R₄ and lead in Pin 10. The capacitor C₁
is charged via R₉ until the voltage V₉, which is present at
the inverting input of Comp. 1, is more positive than the
control voltage V₈ arriving at the non-inverting input via
an impedance converter. During the charge time, which
is dependent of the mains voltage, the pulse output is at
high potential and the switching output Pin 10 is open. If
V₉ now becomes greater than V₁₀, the output from
Comp. 1 switches over the output stage logic via an AND
gate.
TELEFUNKEN Semiconductors
3 (9)
Rev. A1, 29-May-96