E5530 Datasheet, PDF (3/5 Pages) ATMEL Corporation – 128-bit Read-only IDIC for RF Identification

e5530
PSK
A logical “1” causes (at the end of the bit period) a 180°
phase shift on the carrier frequency, while a logical “0”
causes no phase shift. The carrier frequency is RF/2.
BIPH
Logical “1” produces a signal which is the same as the bit-
clock and a logical “0” produces a signal of twice the
bitclock period.
Manchester
A logical “1” causes a positive edge in the middle of a bit
period, while a logical “0” causes negative edge.
A combination of BIPH- and FSK-modulation is also
optionally available. The available combinations be-
tween the modulation types and the bitrates are shown in
table “Transmission Options”.
DataClk
Data
FSK
PSK
Man
Biph
95 10278
1
0
1
1
0
0
1
Figure 5. Timing diagram for modulation options
Absolute Maximum Ratings
Parameters
Maximum current into Coil1 and Coil2
Maximum power dissipation (dice)
Maximum ambient air temperature with voltage applied
Storage temperature
Symbol
I_coil
P_tot
T_amb
T_stg
Value
10
100
–40 to +125
–65 to +150
Unit
mA
mW^*
°C
°C
* _{Free-air condition. Time of application: 1 s}
Stresses above those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device.
Functional operation of the device at these conditions is not imlied.
Rev. A3, 17-Sep-98
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