U490B Datasheet, PDF (2/6 Pages) TEMIC Semiconductors – One-Shot Phase Control

U490B
Pin Description
NC ₁
Trigger ₂
Sync. ₃
GND ₄
8 ^VS
7 ^Output
6 ^Ramp
5 ^Contr
Pin Symbol
Function
1
NC Not connected
2 Trigger Triggering
3
Sync. Synchronization
4
GND Ground
5
Contr Control input
6
Ramp Ramp
7
Output Output
8
V_S Supply voltage
Supply, Pin 8
Internal voltage limiter enables a simple supply from the
mains via series resistor R₁.The supply voltage between
Pin 8 (V_S) and ground (Pin 4) builts up via R₁ and is
smoothed by the capacitor C_1.
Series resistor R₁ can be calculated as follows:
[ R_1max
0.85 x
V_mains – V_Smax
2 x I_tot
where
V_mains
V_Smax
I_tot
I_Smax
I_X
+ Mains supply voltage
+ Maximum supply voltage
+ ) I_Smax I_X
+ Maximum current consumption of the IC
+ Current consumption of the
external components
Phase Control, Pins 3, 5 and 6
The circuit is synchronized with mains supply through
Pin 3. As long as the switch S₁ is open, the circuit is in
wait state i.e., the capacitor C₆ (150 nF) is discharged and
is kept in this state (High level). When the switch S₁ is
closed, there is a current flow in Pin 2 which is evaluated
by the circuit. If this current flows after the elapse of delay
time, then the phase control is released. Capacitor, C₆, is
+ then charged with I₆ 100 mA towards ground. At the
[ same time, there is a current flow of 100 mA into Pin 5,
which results in voltage drop across resistor R₅. Control
voltage, V₅, is then 1.5 V lower internally.
The output stage is released when the ramp voltage V₆ is
* equal to (V₅ 1.5 V). When the voltage difference is
[ 150 mV, it is again turned–off.
The result is an output pulse, whose phase shift to the zero
crossing of mains voltage is determined by the resistor R₅
[ ^{at control input Pin 5 (see fig. 2). Capacitor C6 is charged}
to a value of 1.5 V. It remains there till the switch S₁
again opens and the repetition delay time is over.
The circuit is released, when four periods of the line volt-
age have expired after build up of the operating voltage,
before the switch S₁ is closed.
S₁
closed
open
V₈
V₃
(Sync.)
V₈
V₂
(Trigger)
V₆
(Ramp)
V₇
(Output)
0
”X”
50 ms
100 ms
t₁
V₆
V₅ – 1.5 V
150 ms
200 ms
t
”X”
150 mV
V₇
95 10867
t_p
t
Figure 2. Signal characteristics
2 (6)
TELEFUNKEN Semiconductors
Rev. A1, 29-May-96