U4083B Datasheet, PDF (2/11 Pages) TEMIC Semiconductors – Low-Power Audio Amplifier for Telephone Applications

U4083B
Pin Description
CD ¹
8 _VO2
FC2 ²
FC1 3
7 GND
6 VS
Vi ₄
5 VO1
94 8022
Figure 2. Pinning
Pin Symbol
Function
1
CD Chip disable
2
FC2 Filtering, power supply rejection
3
FC1 Filtering, power supply rejection
4
V_i Amplifier input
5
VO1 Amplifier output 1
6
V_S Voltage supply
7
GND Ground
8
VO2 Amplifier output 2
Functional Description
Including External Circuitry
* Pin 1: Chip disable digital input (CD)
Pin 1 (chip disable) is used to power down the IC to con-
serve power or muting or both.
W Input impedance at pin 1 is typically 90 k .
Logic 0 < 0.8 V IC enabled (normal operation)
Logic 1 > 2 V IC disabled
Figure 15 shows power supply current diagram. The
change in differential gain from normal operation to
muted operation (muting) is more than 70 dB.
Switching characteristics are as follows:
turn-on time
turn-off time
v m ^{ton = 12 to 15 ms}
t_off 2 s
They are independent of C₁, C₂ and V_S.
Voltages at Pins 2 and 3 are supplied from V_S and there-
fore do not change when the U4083B is disabled.
Outputs– V_O1 (Pin 5) and V_O2 (Pin 8) –turn to a high im-
pedance condition by removing the signal from the
speaker.
When signals are applied from an external source to the
outputs (disabled), they must not exceed the range be-
tween the supply voltage, V_s, and Ground.
Pins 2 and 3: Filtering, power supply rejection
Power supply rejection is provided by capacitors C₁ and
C₂ at Pin 3 and Pin 2, respectively. C₁ is dominant at high
frequencies whereas C₂ is dominant at low frequencies
(figures 4 to 7). Values of C₁ and C₂ depend on the
conditions of each application. For example, a line
powered speakerphone (telephone amplifier) will require
more filtering than a system powered by regulated power
supply.
The amount of rejection is a function of the capacitors and
the equivalent impedance looking into Pin 3 and Pin 2
(see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C₁ and C₂ also influence
the turn-on time of the circuit at power-up since capaci-
W tors are charged up through the internal resistors (50 k
W and 125 k ) as shown in the block diagram.
Figure 1 shows turn-on time versus C₂ at V_S = 6 V, for two
different C₁ values.
Turn-on time is 60% longer when V_S = 3 V and 20%
m ^{shorter when VS = 9 V.}
Turn-off time is less than 10 s
Pin 4: Amplifier input V_i
Pin 5: Amplifier output 1 V_O1
Pin 8: Amplifier output 2 V_O2
w ^{There are two identical operational amplifiers. Amp.1 has}
an open loop gain 80 dB at 100 Hz (figure 2), whereas
the closed loop gain is set by external resistors, Rf and Ri
(figure 3). The amplifier is unity gain stable, and has a
unity gain frequency of approximately 1.5 MHz. A closed
loop gain of 46 dB is recommended for a frequency range
of 300 to 3400 Hz (voice band). Amp.2 is internally set
to a gain of –1.0 (0 dB). The outputs of both amplifiers are
capable of sourcing and sinking a peak current of 200 mA.
Output voltage swing is between 0.4 V and V_s – 1.3 V at
maximum current (figures 18 and 19).
The output dc offset voltage between Pins 5 and 8 (V_O1
– V_O2) is mainly a function of the feedback resistor, R_f,
because the input offset voltage of the two amplifiers
generally neutralize each other.
Bias current of Amp. 1 which is constant with respect to
V_s, however flows out of Pin 4 (V_i) and through R_f,
forcing V₀₁ to shift negative by an amount equal to R_f I_IB
and V_O2 positive to an equal amount.
The output offset voltage specified in the electrical char-
acteristics is measured with the feedback resistor
W (R_f = 75 k ) shown in typical application circuit. It takes
into account bias current as well as internal offset voltages
of the amplifiers.
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TELEFUNKEN Semiconductors
Preliminary Information
Rev. A2, 07-Apr-97