80C32 Datasheet, PDF (16/20 Pages) NXP Semiconductors – CMOS single-chip 8-bit microcontrollers

80C32/80C52
MATRA MHS
External Data Memory Characteristics (values in ns)
SYM-
BOL
PARAMETER
TRLRH RD pulse Width
TWLWH WR pulse Width
TLLAX Address Hold After ALE
TRLDV RD to Valid in
TRHDX Data hold after RD
TRHDZ Data float after RD
TLLDV ALE to Valid Data In
TAVDV Address to Valid Data IN
TLLWL ALE to WR or RD
TAVWL Address to WR or RD
TQVWX Data valid to WR transition
TQVWH Data Setup to WR transition
TWHQX Data Hold after WR
TRLAZ RD low to Address Float
TWHLH RD or WR high to ALE high
16 MHz 20 MHz 25 MHz 30 MHz 36 MHz 40 MHz 42 MHz 44 MHz
min max min max min max min max min max min max min max min max
340
270
210
180
120
100
90
80
340
270
210
180
120
100
90
80
85
85
70
55
35
30
25
25
240
210
175
135
110
90
80
70
0
0
0
0
0
0
0
0
90
90
80
70
50
45
40
35
435
370
350
235
170
150
140
130
480
400
300
260
190
180
175
170
150 250 135 170 120 130 90 115 70 100 60 95 55 90 50 85
180
180
140
115
75
65
60
55
35
35
30
20
15
10
8
6
380
325
250
215
170
160
150
140
40
35
30
20
15
10
8
6
0
0
0
0
0
0
0
0
35 90 35 60 25 45 20 40 20 40 15 35 13 33 13 33
External Data Memory Write Cycle
External Data Memory Read Cycle
16
Rev. E (31/08/95)