U2405B Datasheet, PDF (10/17 Pages) TEMIC Semiconductors – Fast Charge Controller for Drained NiCd/NiMH Batteries

U2405B
Current Regulation Via Phase
Control (Figure 8)
Phase Control
An internal phase control monitors the angle of current
flow through the external thyristors as shown in figure 2.
The phase control block represents a ramp generator
synchronized by mains zero cross over and a comparator.
The comparator will isolate the trigger output, Pin 1, until
the end of the half wave (figure 8) when the ramp voltage,
V_ramp, reaches the control voltage level, Vö_i, within a
mains half wave.
Charge Current Regulation (Figure 2)
According to figure 2 the operational amplifier (OpAmp)
regulates the charge current, I_ch (= 160 mV / R_sh),
average value. The OpAmp detects the voltage drop
across the shunt resistor (R_sh) at input Pin 6 as an actual
value. The actual value will then be compared with an
internal reference value (rated value of 160 mV).
The regulator’s output signal, V_5, is at the same time the
control signal of the phase control, Vö_i (Pin 4). In the
adjusted state, the OpAmp regulates the current flow
angle through the phase control until the average value at
the shunt resistor reaches the rated value of 160 mV.
The corresponding evaluation of capacitor C_R at the
operational amplifier (regulator) output determines the
dynamic performance of current regulation.
V_sync
(Pin 18)
f_mains = 50 Hz
100mV
Internal
zero pulse
Ramp
voltage
(Pin 17
) _6V
V_öi
Trigger
output
(Pin 1)
V_öi
V_öi
10 (17)
0ms
10ms
20ms
Current flow angle
Figure 8. Phase control function diagram
30ms
93 7697 e
TELEFUNKEN Semiconductors
Rev. A2, 14-Nov-96