U2730B-B Datasheet, PDF (1/12 Pages) TEMIC Semiconductors – L-Band Down-Converter for DAB Receivers

U2730B-B
L-Band Down-Converter for DAB Receivers
Description
The U2730B-B is a monolithic integrated L-band down-
converter circuit fabricated in TEMIC’s advanced
UHF5S technology. Combining the functionality of
U2754B-B and U2755B-B in one integrated circuit, it
covers all functions of an L-band down-converter in a
DAB receiver. The device includes a gain-controlled
amplifier, a gain-controlled mixer, an output buffer, a
gain-control block, an L-band oscillator and a complete
frequency syntheziser unit. The frequency syntheziser
block consists of an input buffer for the reference
frequency signal, a reference divider, an LO divider, a
tri-state phase detector, a loop filter amplifier, a lock
detector, a programmable charge pump, a test interface
and a control interface.
Electrostatic sensitive device.
Observe precautions for handling.
Features
D Supply voltage: 8.5 V
D RF frequency range: 1400 MHz to 1550 MHz
D IF frequency range: 150 MHz to 250 MHz
D Overall IM3 rejection: > 40 dB
D Overall gain control range: typ. 30 dB
D DSB noise figure: 9.5 dB
D Gain-controlled amplifier
D Gain-controlled L-band mixer
D On-chip gain-control circuitry
Block Diagram
TH
IF
17
19
AGC 18
∆U
D On-chip VCO, typical frequency 1261.568 MHz
D Internal VCO can be overdriven by an external LO
D On-chip frequency synthesizer
– Fixed LO divider factor: 2464
– Four reference divider factors selectable: 32, 35, 36, 48
– Tristate phase detector with programmable charge pump
– De-activation of tuning output programmable
– Lock-status indication
– Test interface
TMD TRD VCC1 VCC3 VCC4 VCC2 GND
10 11
3 20 28
9
6, 7, 8, 21,
22, 23, 24
Test interface
Voltage
stabilizer
internal supply voltage for
frequency synthesizer
26
RF
25
NRF
VCO
RF counter
2464
Reference counter
32/35/36/48
Lock
detector
Tristate
phase
detector
Programmable
charge pump
(50µA / 200µA)
14 _PLCK
13
PD
20k
12 _CD
4 5 15 16
VREF TANK REF NREF
Control interface
2
27
C
S
Figure 1. Block diagram
Rev. A1, 22-Jul-98
Preliminary Information
14749
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