TSC87C51 Datasheet, PDF (1/23 Pages) TEMIC Semiconductors – CMOS 0 to 25 MHz Programmable 8-bit Microcontroller

TSC87C51
CMOS 0 to 33 MHz Programmable 8–bit Microcontroller
Description
TEMIC’s TSC87C51 is high performance CMOS
EPROM version of the 80C51 CMOS single chip 8 bit
microcontroller.
The fully static design of the TSC87C51 allows to
reduce system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The TSC87C51 retains all the features of the 80C51 with
some enhancement: 4 K bytes of internal code memory
(EPROM); 128 bytes of internal data memory (RAM);
32 I/O lines; two 16 bit timers; a 5-source, 2-level
interrupt structure; a full duplex serial port with framing
error detection; a power off flag; and an on-chip
oscillator.
The TSC87C51 has 2 software-selectable modes of
reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the RAM, the timers, the serial port and the interrupt
system continue to function. In the power down mode
the RAM is saved and all other functions are inoperative.
The TSC87C51 is manufactured using non volatile
SCMOS process which allows it to run up to:
D 33 MHz with VCC = 5 V ± 10%.
D 16 MHz with 2.7 V < VCC < 5.5 V.
Features
D 4 Kbytes of EPROM
G Improved Quick Pulse programming algorithm
G Secret ROM by encryption
D 128 bytes of RAM
D 64 Kbytes program memory space
D 64 Kbytes data memory space
D 32 programmable I/O lines
D Two 16 bit timer/counters
D Programmable serial port with framing error
detection
D Power control modes
D Two–level interrupt priority
D Fully static design
D 0.8µ SCMOS non volatile process
D ONCE Mode
D Enhanced Hooks system for emulation purpose
D Available temperature ranges:
G commercial
G industrial
D Available packages:
G PDIP40 (OTP)
G PLCC44 (OTP)
G PQFP44 (OTP)
G CQPJ44 (UV erasable)
G CERDIP40 (UV erasable)
MATRA MHS
1
Rev. C – 10 Sept 1997
Preliminary