TCL1584 Datasheet, PDF (8/13 Pages) TelCom Semiconductor, Inc – 7A / 5A / 4.6A / 3A, FAST RESPONSE, LOW DROPOUT POSITIVE LINEAR VOLTAGE REGULATORS

PRELIMINARY INFORMATION
TCL1584
TCL1585
TCL1587
7A / 5A / 4.6A / 3A, FAST RESPONSE,
LOW DROPOUT POSITIVE LINEAR
VOLTAGE REGULATORS
When generating the overall thermal design, it is impor-
tant to consider all sources of thermal resistance between
the silicon die and ambient - junction-to-case (Θ_JC), case-to-
heat sink (Θ_CH), heat sink-to-ambient (Θ_HA). NOTE: there
are two separate Θ_JC specifications for the power transistor
and the control circuitry. Both junction temperatures must be
calculated and kept under each respective maximum limit to
ensure proper operation. This Θ_JC is for the physical path
between the die and the bottom metal portion of the case
(both TO-220 and DDPAK-3. Heat flow will be greatest
through this path. It is important that good thermal coupling
is made between the case and heat sink. If electrical
isolation from the heat sink is not required, it is recom-
mended that thermally conductive compound be used.
Otherwise, use a thermally conductive dielectric spacer.
The following is a thermal design example:
NOTE: Without heat sinking, the thermal resistance for the
TO-220 and DDPAK-3 packages are 53°C/W and
76°C/W respectively.
Using a TCL1585-3.3 in a TO-220 package:
Assumptions:
T_A = +70°C
V_IN = 5.25V (5V + 5%)
V_OUT = 3.30V
I_OUT = 4.6A
Θ_HA = 3.5°C/W (heat sink-to-ambient)
Θ_CH = 1.5°C/W (case-to-heat sink)
Θ_JC = 3°C/W (power transistor)
Θ_JC = 0.7°C/W (control circuitry)
Power dissipation:
P_D = (V_IN – V_OUT)(I_OUT) = (5.25 – 3.3)(4.6) = 8.97W
Junction Temperatures:
T_J = T_A + P_D(Θ_HA + Θ_CH + Θ_JC)
Control Circuitry:
T_J = 70 + 8.97(3.5 + 1.5 + 0.7) = 121.1°C
Power Transistor:
T_J = 70 + 8.97(3.5 + 1.5 + 3) = 141.8°C
These values for T_J fall within the maximum allowed
junction temperature for each die section indicating ad-
equate heat sinking with some margin.
TCL1584/1585/1587-04 6/6/97
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