TC7135 Datasheet, PDF (5/13 Pages) TelCom Semiconductor, Inc – 4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER

4-1/2 DIGIT
ANALOG-TO-DIGITAL CONVERTER
1
TC7135
SW _I
+ IN
SW
–
RI
SW
+
RI
REF
IN
SWR
CREF
SWZ
ANALOG
COM
SW
+
RI
SW
–
RI
ANALOG
INPUT BUFFER
+
RINT
–
SWIZ SWZ
SWZ
CINT
CSZ
–
+
INTEGRATOR
COMPARATOR
+
–
TO
DIGITAL
SECTION
SW _I
– IN
SW1
SWITCH OPEN
SWITCH CLOSED
Figure 3E. Integrator Output Zero Phase
GENERAL THEORY OF OPERATION
(All Pin Designations Refer to 28-Pin DIP)
Dual-Slope Conversion Principles
The TC7135 is a dual-slope, integrating analog-to-
digital converter. An understanding of the dual-slope con-
version technique will aid in following detailed TC7135
operational theory.
The conventional dual-slope converter measurement
cycle has two distinct phases:
(1) Input signal integration
(2) Reference voltage integration (deintegration)
The input signal being converted is integrated for a fixed
time period, measured by counting clock pulses. An oppo-
site polarity constant reference voltage is then integrated
until the integrator output voltage returns to zero. The
reference integration time is directly proportional to the input
signal.
In a simple dual-slope converter, a complete conversion
requires the integrator output to "ramp-up" and "ramp-
down."
A simple mathematical equation relates the input signal,
reference voltage, and integration time:
∫ ¹
t_{SI VIN(t) dt = VR tRI ,}
RC ₀
RC
where:
V_R = Reference voltage
t_SI = Signal integration time (fixed)
t_RI = Reference voltage integration time (variable).
TELCOM SEMICONDUCTOR, INC.
For a constant V_IN:
[ ] ^{VIN = VR}
t_{RI .}
t_SI
2
The dual-slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as they are
stable during a measurement cycle. Noise immunity is an
inherent benefit. Noise spikes are integrated, or averaged,
to zero during integration periods. Integrating ADCs are
3 ^{immune to the large conversion errors that plague succes-}
sive approximation converters in high-noise environments.
(See Figure 4.)
TC7135 Operational Theory
The TC7135 incorporates a system zero phase and
integrator output voltage zero phase to the normal two-
4 ^{phase dual-slope measurement cycle. Reduced system}
errors, fewer calibration steps, and a shorter overrange
recovery time result.
The TC7135 measurement cycle contains four phases:
(1) System zero
(2) Analog input signal integration
(3) Reference voltage integration
5 ^{(4) Integrator output zero}
Internal analog gate status for each phase is shown in
Table 1.
ANALOG
INPUT
SIGNAL
INTEGRATOR
–
+
–COMPARATOR
+
6
REF
VOLTAGE
SWITCH
DRIVER
PHASE
CONTROL
CONTROL
LOGIC
POLARITY CONTROL
CLOCK
DISPLAY
COUNTER
VIN Ï· VFULL _SCALE
VIN Ï· 1/2 VFULL _SCALE
7
FIXED
SIGNAL
INTEGRATE
TIME
VARIABLE
REFERENCE
INTEGRATE
TIME
Figure 4. Basic Dual-Slope Converter
8
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