TC530 Datasheet, PDF (10/15 Pages) TelCom Semiconductor, Inc – 5V PRECISION DATA ACQUISITION SUBSYSTEMS

TC530
TC534
5V PRECISION DATA ACQUISITION
SUBSYSTEMS
R_INT (MΩ) =
V_INMAX
20
where: V_INMAX = Maximum Input Voltage (full count
voltage)
R_INT = Integrating Resistor (in MΩ)
For loop stability, R_INT should be ≥ 50kΩ.
(2) Select Reference (C_REF) and Auto Zero (C_AZ)
Capacitors
C_REF and C_AZ must be low leakage capacitors (such
as polypropylene). The slower the conversion rate,
the larger the value C_REF must be. Recommended
capacitors for C_REF and C_AZ are shown in Table 1.
Larger values for C_AZ and C_REF may also be used to
limit roll-over errors.
Table 1. C_REF and C_AZ Selection
Conversions Typical Value of Suggested *
Per Second C_REF, C_AZ (µF) Part Number
>7
0.1
WIMA MK12 .1/63/20
2 to 7
0.22
WIMA MK12 .22/63/20
2 or less
0.47
WIMA MK12 .47/63/20
*WIMA Corp. listing on the last page of this data sheet.
3. Calculate Integrating Capacitor (C_INT)
The integrating capacitor must be selected to maxi-
mize integrator output voltage swing. The integrator
output voltage swing is defined as the absolute value
of V_DD (or V_SS) less 0.9V (i.e. |V_DD – 0.9V| or |V_SS +
0.9V|). Using the 20µA buffer maximum output
current, the value of the integrating capacitor is
calculated using the following equation:
C_INT (µF) =
where: t_INT
V_S
C_INT
(t_INT)(20)
(V_S – 0.9)
= Integration Period
= Applied Supply Voltage
= Integrator Capacitor Value (in µF)
It is critical that the integrating capacitor have a very
low dielectric absorption. PPS capacitors are an
example of one such chemistry. Table 2 summa-
rizes various capacitors suitable for C_INT.
Table 2. Recommend Capacitor for C_INT
Value
Suggested Part Number*
0.1
WIMA MK12 .1/63/20
0.22
WIMA MK12 .22/63/20
0.33
WIMA MK12 .33/63/20
0.47
WIMA MK12 .47/63/20
*WIMA Corp. listing on the last page of this data sheet.
4. Calculate V_REF
The reference deintegration voltage is calculated
using:
V_REF (in Volts) = ^{(VS – 0.9)(CINT)(RINT)}
2(t_INT)
Serial Port
Communication with the TC530/534 is accomplished
over a 3 wire serial port. Data is clocked into D_IN on the rising
edge of D_CLK and clocked out of D_OUT on the falling edge of
D_CLK. R/W must be HIGH to read converted data from the
serial port and LOW to write the LOAD VALUE to the TC530/
534.
Load Value Write Cycle (Figure 4)
Following the power-up reset pulse, the LOAD VALUE
(which sets the duration of AZ and INT) must next be
transmitted to the serial port. To accomplish this, the proces-
sor monitors the state of EOC (which is available as a
hardware output or at D_OUT). R/W is taken low to initiate the
write cycle only when EOC is low (during the AZ phase).
(Failure to observe EOC low may cause an offset voltage to
be developed across C_INT resulting in erroneous readings).
The 8 bit LOAD VALUE data on D_IN is clocked in by D_CLK.
The processor then terminates the write cycle by taking
R/W high. (Data is transferred from the serial input shift
register to the time base counter on the rising edge of R/W,
and data conversion is initiated).
Data Read Cycle (Figure 5)
Data is shifted out of the serial port in the following order:
End of Conversion (EOC), Overrange (OVR), Sign (SGN),
conversion data (MSB first). When R/W is high, the state of
the EOC bit can be polled by simply reading the state of
D_OUT. This allows the processor to determine if new data is
available without connecting an additional wire to the EOC
output pin (this is especially useful in a polled environment).
Input Multiplexer (TC534 Only)
A 4 input, differential multiplexer is included in the
TC534. The states of channel address lines A0 and A1
determine which differential V_IN pair is routed to the con-
3-56
TELCOM SEMICONDUCTOR, INC.