TC520A Datasheet, PDF (1/8 Pages) TelCom Semiconductor, Inc – SERIAL INTERFACE ADAPTER FOR TC500 A/D CONVERTER FAMILY

EVALUATION
KIT
AVAILABLE
1
TC520A
SERIAL INTERFACE ADAPTER FOR TC500 A/D CONVERTER FAMILY
2
FEATURES
GENERAL DESCRIPTION
s Converts TC500/500A/510/514 to Serial Operation
s Programmable Conversion Rate and Resolution
for Maximum Flexibility
s Supports up to 17 Bits of Accuracy Plus
Polarity Bit
s Low Power Operation: Typically 7.5mW
s 14-Pin DIP or 16-Pin SOIC Packages
s Polled or Interrupt Mode Operation
ORDERING INFORMATION
Part No.
TC520ACOE
TC520ACPD
TC500EV
Package
Operating
Temp. Range
16-Pin SOIC (Wide) 0°C to +70°C
14-Pin Plastic DIP
0°C to +70°C
Evaluation Kit for TC500 Family
PIN CONFIGURATION
VDD 1
DGND 2
CMPTR 3
B4
A⁵
OSCOUT 6
OSCIN 7
TC520ACPD
VDD ₁
14 _CE
DGND 2
13 DV
CMPTR
3
12 LOAD
B
4
11 DIN
A
5
10 _DCLK
OSCOUT
6
9 DOUT
OSCIN
7
8 READ
N/C 8
TC520ACOE
16 CE
15 ^DV
14 ^LOAD
13 DIN
12 DCLK
11 DOUT
10 READ
9 N/C
The TC520A Serial Interface Adapter provides logic
control for TelCom's TC500/500A/510/514 family of dual
slope, integrating A/D converters. It directly manages TC500
converter phase control signals A, B, and CMPTR thereby
reducing host processor task loading and software complex-
3 ^{ity. Communication with the TC520A is accomplished over}
a 3 wire serial port. Key converter operating parameters are
programmable for complete user flexibility.
Data conversion initiated when the CE input is brought
low. The converted data (plus overrange and polarity bits)
are held in an 18 bit shift register until read by the processor,
or until the next conversion is completed. Data may be
clocked out of the TC520A at any time, and at any rate the
4 ^{user prefers. A Data Valid (DV) output is driven active at the}
start of each conversion cycle indicating the 18 bit shift
register update has just been completed. This signal may be
polled by the processor, or can be used as data ready
interrupt.
The TC520A timebase can be derived from an external
frequency source of up to 6MHz; or can operate from its own
external crystal. It requires a single 5V logic supply and
dissipates less than 7.5mW.
5
FUNCTIONAL BLOCK DIAGRAM
VDD
GND
1
2
GATE
8-BIT SHIFT REG.
8
8-BIT COUNTER
÷256
GATE
A5
B4
3
CMPTR
CE ¹⁴
DV ¹³
OSCIN
OSCOUT
7
6 ^÷4
LOGIC
CONTROL
TIME OUT
FORCE AUTO-ZERO
POLARITY BIT
CLEAR COUNT
18-BIT SHIFT REGISTER
16
GATE
SYSCLK
GATE
16-BIT COUNTER _OVERRANGE
BIT
TELCOM SEMICONDUCTOR, INC.
6
Pin Out of
14-Pin Package
11 _DIN
12 _LOAD
9 _DOUT
10 _DCLK
7
8 _READ
8
TC520A-1 9/16/96
3-39