English
Language : 

TMS28F008AXY_08 Datasheet, PDF (1/52 Pages) Texas Instruments – AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
TMS28F008Axy,TMS28F800Axy
1Ă048Ă576 BY 8ĆBIT/524Ă288 BY 16ĆBIT
AUTOĆSELECT BOOTĆBLOCK FLASH MEMORIES
SMJS851A − NOVEMBER 1997 − REVISED MARCH 1998
D Organization . . . 1 048 576 By 8 Bits
524 288 By 16 Bits
D Array-Blocking Architecture
− Two 8K-Byte/4K-Word Parameter Blocks
− One 96K-Byte/48K-Word Main Block
− Seven 128K-Byte/64K-Word Main Blocks
− One 16K-Byte/8K-Word Protected Boot
Block
− Top or Bottom Boot Locations
D All Inputs / Outputs TTL-Compatible
D Maximum Access / Minimum Cycle Time
5-V VCC 3-V VCC
’28F008Axy70 70 ns 100 ns
’28F008Axy80 80 ns 120 ns
’28F800Axy70 70 ns 100 ns
’28F800Axy80 80 ns 120 ns
(See Table 1 for VCC/VPP Voltage
Configuration)
D 100 000- and 10 000-Program/ Erase Cycle
Versions
D Three Temperature Ranges
− Commercial . . . 0°C to 70°C
− Extended . . . − 40°C to 85°C
− Automotive . . . − 40°C to 125°C
D Embedded Program/Erase Algorithms
− Automated Byte Programming
− Automated Word Programming
− Automated Block Erase
− Erase Suspend/Erase Resume
D Automatic Power-Saving Mode
D JEDEC Standards Compatible
− Compatible With JEDEC Byte/Word
Pinouts
− Compatible With JEDEC EEPROM
Command Set
D Fully Automated On-Chip Erase and
Byte / Word Program Operations
D Package Options
− 44-Pin Plastic Small-Outline Package
(PSOP) (DBJ Suffix)
− 40-Pin Thin Small-Outline Package
(TSOP) (DCD Suffix)
− 48-Pin TSOP (DCD Suffix)
− 48-Ball Micro Ball Grid Array
(µBGAt) available
D Low Power Dissipation ( VCC = 5.5 V )
− Active Write . . . 330 mW ( Byte Write)
− Active Read . . . 220 mW ( Byte Read)
− Active Write . . . 330 mW ( Word Write)
− Active Read . . . 275 mW ( Word Read)
− Block Erase . . . 330 mW
− Standby . . . 0.55 mW (CMOS-Input
Levels)
− Deep Power-Down Mode . . . 0.044 mW
D Write-Protection for Boot Block
D Industry Standard Command-State Machine
(CSM)
− Erase Suspend/Resume
− Algorithm-Selection Identifier
D Flexible VPP/Supply Voltage Combination
PIN NOMENCLATURE
A0 −A18 Address Inputs
A0 −A19 Address Inputs (for 40-pin TSOP only)
BYTE
Byte Enable
DQ0 −DQ14 Data In / Out
DQ15/A −1 Data In / Out (word-wide mode),
Low-Order Address (byte-wide mode)
CE
Chip Enable
OE
Output Enable
NC
No Internal Connection
RP
Reset / Deep Power Down
VCC
VPP
VSS
WE
Power Supply
Power Supply for Program / Erase
Ground
Write Enable
WP
Write Protect (for 40-pin and 48-pin
TSOP only)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
µBGA is a trademark of Tessera, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1998, Texas Instruments Incorporated
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
1