AMC7812B Datasheet, PDF (44/92 Pages) TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
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Alarm Operation
The device continuously monitors all analog inputs and temperatures in normal operation. When any input is out
of the specified range, an alarm triggers. When an alarm state occurs, the corresponding individual alarm bit in
the status register is set ('1'). The global alarm bit (GALR) in AMC configuration register 0 is the OR of individual
alarms, see Figure 94. When the ALARM-LATCH-DIS bit in the alarm control register is cleared ('0'), the alarm is
latched. The global alarm bit (GALR) maintains '1' until the corresponding error conditions subside and the alarm
status is read. The alarm bits are referred to as being latched because they remain set until read by software.
This design ensures that out-of-limit events cannot be missed if the software is polling the device periodically. All
bits are cleared when reading the status register, and all bits are reasserted if the out-of limit condition still exists
on the next monitoring cycle, unless otherwise noted.
Alarm
Status
Bits
CH0-ALR
THERM-ALR
GALR Bit
Figure 94. Global Alarm Bit
When the ALARM-LATCH-DIS bit in the alarm control register is set ('1'), the alarm bit is not latched. The alarm
bit in the status register goes to '0' when the error condition subsides, regardless of whether the bit is read or not.
When GALR is '1', the ALARM pin goes low. When the GALR bit is '0', the ALARM is high (inactive).
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