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INA159_13 Datasheet, PDF (3/18 Pages) Texas Instruments – Precision, Gain of 0.2 Level Translation DIFFERENCE AMPLIFIER
INA159
www.ti.com
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
ELECTRICAL CHARACTERISTICS: VS = +5V
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted.
INA159
PARAMETER
OFFSET VOLTAGE(1)
Initial (1)
VOS
vs Temperature
vs Power Supply
PSRR
Reference Divider Accuracy(2)
over Temperature
INPUT IMPEDANCE(3)
Differential
Common-Mode
INPUT VOLTAGE RANGE
Common-Mode Voltage
Range
VCM
Positive
Negative
Common-Mode Rejection
Ratio
CMRR
over Temperature
OUTPUT VOLTAGE NOISE(4)
f = 0.1Hz to 10Hz
f = 10kHz
GAIN
Initial
G
Error
vs Temperature
Nonlinearity
OUTPUT
Voltage, Positive
Voltage, Negative
Current Limit, Continuous to Common
Capacitive Load
Open-Loop Output Impedance
RO
FREQUENCY RESPONSE
Small-Signal Bandwidth
Slew Rate
SR
Settling Time, 0.01%
tS
Overload Recovery Time
CONDITIONS
RTO
VS = ±2.5V, Reference and Input Pins Grounded
VS = ±0.9V to ±2.75V
RTI
VCM = −10V to +10V, RS = 0Ω
RTO
VREF2 = 4.096V, RL Connected to GND,
(VIN+) − (VIN−) = −10V to +10V, VCM = 0V
VREF2 = 4.096V, RL Connected to GND
VREF2 = 4.096V, RL Connected to GND
f = 1MHz, IO = 0
−3dB
4V Output Step, CL = 100pF
50% Overdrive
MIN
TYP
MAX UNIT
±100
±1.5
±20
±0.002
±0.002
±500
±100
±0.024
µV
µV/°C
µV/V
%
%
240
kΩ
60
kΩ
17.5
−12.5
80
96
94
10
30
V
V
dB
dB
µVPP
nV/√Hz
0.2
±0.005
±1
±0.0002
±0.024
V/V
%
ppm/°C
% of FS
(V+) − 0.1 (V+) − 0.02
V
(V−) + 0.048 (V−) + 0.01
V
±60
mA
See Typical Characteristic
pF
110
Ω
1.5
MHz
15
V/µs
1
µs
250
ns
POWER SUPPLY
Specified Voltage Range
Operating Voltage Range
Quiescent Current
VS
IQ
IO = 0mA, VS = ±2.5V,
Reference and Input Pins Grounded
+1.8
+5
V
+5.5
V
1.1
1.5
mA
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
qJA
MSOP-8
Surface-Mount
−40
+125 °C
−40
+150 °C
−65
+150 °C
150
°C/W
(1) Includes effects of amplifier input bias and offset currents.
(2) Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 2.
(3) Internal resistors are ratio matched but have ±20% absolute value.
(4) Includes effects of amplifier input current noise and thermal noise contribution of resistor network.
3