TPS51220A-Q1 Datasheet, PDF (23/50 Pages) Texas Instruments – Fixed Frequency, 99% Duty Cycle Peak Current Mode Notebook System Power Controller

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TPS51220A-Q1
SLUSAI2 – MARCH 2011
3.3-V, 10-mA LDO (VREG3)
A 3.3-V, 10-mA, linear regulator is integrated in the TPS51220A-Q1. This LDO services some of the analog
circuit in the device and provides a handy standby supply for 3.3-V Always On voltage in the notebook system.
Apply a 2.2-μF (at least 1-μF), high quality X5R or X7R ceramic capacitor from VREG3 to (signal) GND in
adjacent to the device.
2-V, 100-μA Sink/Source Reference (VREF2)
This voltage is used for the reference of the loop compensation network. Apply a 0.22-μF (at least 0.1-μF),
high-quality X5R or X7R ceramic capacitor from VREF2 to (signal) GND in adjacent to the device.
5.0-V, 100-mA LDO (VREG5)
A 5.0-V, 100-mA, linear regulator is integrated in the TPS51220A-Q1. This LDO services the main analog supply
rail and provides the current for gate drivers until switch-over function becomes enable. Apply a 10-μF (at least
4.7-μF), high-quality X5R or X7R ceramic capacitor from VREG5 to (power) GND in adjacent to the device.
VREG5 SWITCHOVER
When EN1 is high, PGOOD1 indicates GOOD and a voltage of more than 4.83 V is applied to V5SW, the
internal 5V-LDO is shut off and the VREG5 is shorted to V5SW by an internal MOSFET after an 7.7-ms delay.
When the V5SW voltage becomes lower than 4.65 V, EN1 becomes low, or PGOOD1 indicates BAD, the internal
switch is turned off, and the internal 5V-LDO resumes immediately.
BASIC PWM OPERATIONS
The main control loop of the SMPS is designed as a fixed frequency, pulse width modulation (PWM) controller. It
supports two control schemes; a peak current mode and a proprietary D-CAP mode. Current mode achieves
stable operation with any type of output capacitors, including low ESR capacitor(s) such as ceramic or specialty
polymer capacitors. D-CAP mode does not require an external compensation circuit, and is suitable for relatively
larger ESR capacitor(s) configuration. These control schemes are selected with FUNC pin. See Table 4.
CURRENT MODE
The current mode scheme uses the output voltage information and the inductor current information to regulate
the output voltage. The output voltage information is sensed by VFBx pin. The signal is compared with the
internal 1-V reference and the voltage difference is amplified by a transconductance amplifier (VFB-AMP). The
inductor current information is sensed by CSPx and CSNx pins. The voltage difference is amplified by another
transconductance amplifier (CS-AMP). The output of the VFB-AMP indicates the target peak inductor current. If
the output voltage decreases, the TPS51220A-Q1 increases the target inductor current to raise the output
voltage. Alternatively, if the output voltage rises, the TPS51220A-Q1 decreases the target inductor current to
reduce the output voltage.
At the beginning of each clock cycle, the high-side MOSFET is turned on, or becomes ‘ON’ state. The high-side
MOSFET is turned off, or becomes OFF state, after the inductor current becomes the target value which is
determined by the combination value of the output of the VFB-AMP and a ramp compensation signal. The ramp
compensation signal is used to prevent sub-harmonic oscillation of the inductor current control loop. The
high-side MOSFET is turned on again at the next clock cycle. By repeating the operation in this manner, the
controller regulates the output voltage. The synchronous low-side or the rectifying MOSFET is turned on each
OFF state to keep the conduction loss minimum.
D-CAP™ MODE
With the D-CAP mode operation, the PWM comparator compares VREF2 with the combination value of the
COMP voltage, VFB-AMP output, and the ramp compensation signal. When the both signals are equal at the
peak of the voltage sense signal, the comparator provides the OFF signal to the high-side MOSFET driver.
Because the compensation network is implemented on the part and the output waveform itself is used as the
error signal, external circuit is simplified. Another advantage is its inherent fast transient response. A trade-off is
a sufficient amount of ESR required in the output capacitor. The D-CAP™ mode is suitable for relatively larger
output ripple voltage application. The inductor current information is used for the overcurrent protection and light
load operation.
Copyright © 2011, Texas Instruments Incorporated
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