TLV333 Datasheet, PDF (17/34 Pages) Texas Instruments – CMOS Operational Amplifiers Zero-Drift

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11.2 Layout Example
VIN
RG
+
RF
VOUT
(Schematic Representation)
TLV333, TLV2333, TLV4333
SBOS751 – DECEMBER 2015
Run the input traces
as far away from
the supply lines
as possible
Place components
close to device and to
each other to reduce
parasitic errors
RG
GND
VIN
RF
N/C
±IN
+IN
V±
N/C
V+
OUTPUT
N/C
VS+
GND
Use low-ESR, ceramic
bypass capacitor
Use low-ESR,
ceramic bypass
capacitor
GND
VS±
VOUT
Figure 24. Layout Example
Ground (GND) plane on another layer
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