MQFL-28-15D Datasheet, PDF (12/18 Pages) SynQor Worldwide Headquarters – HIIGH RELLIIABIILLIITTY DC/DC CONVERTTER

Technical Specification
MQFL-28-15D
Output: ±15 V
Current: 8 A Total
Both enable pins are internally pulled high so that an open con-
nection on both pins will enable the converter. Figure A shows
the equivalent circuit looking into either enable pins. It is TTL
compatible.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source that
is in the 500 kHz to 700 kHz range. A pulse train at the desired
frequency should be applied to the SYNC IN pin (pin 6) with
respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This out-
5V
PIN 6
PIN 2
5K
SYNC IN
5K
IN RTN
TO SYNC
CIRCUITRY
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5V
5K
SYNC OUT
OPEN COLLECTOR
OUTPUT
IN RTN
PIN 5
PIN 2
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
put can be used to drive the SYNC IN pins of as many as ten (10)
other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchroniza-
tion frequency if there is.
The SYNC OUT signal is available only when the dc input volt-
age is above approximately 12V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2
pin will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees rela-
tive to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN
pin. Figure C shows the equivalent circuit looking into the SYNC
OUT pin.
CURRENT SHARE: Like the single output MQFL converters, the
dual output converters have a SHARE pin (pin 11). In this case,
however, the voltage at this pin represents the sum of the positive
and negative output currents. As such, the share pin cannot
cause two or more paralleled converters to share load currents on
the positive or negative outputs independently. Nevertheless,
there may be applications where the two currents have a fixed
ratio, in which case it can make sense to force the sharing of total
current among several converters.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all
of the converters’ OUTPUT RETURN pins together through a low
DC and AC impedance. When this is done correctly, the con-
verters will deliver their appropriate fraction of the total load cur-
rent to within +/- 10% at full rated load.
Whether or not converters are paralleled, the voltage at the
SHARE pin could be used to monitor the approximate average
current delivered by the converter(s). A nominal voltage of 1.0V
represents zero current and a nominal voltage of 2.2V represents
the maximum rated total current, with a linear relationship in
between. The internal source resistance of a converter’s SHARE
pin signal is 2.5 kW. During an input voltage fault or primary dis-
able event, the SHARE pin outputs a power failure warning pulse.
The SHARE pin will go to 3V for approximately 14ms as the out-
put voltage falls.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-28-T filter) with
Product # MQFL-28-15D
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Doc.# 005-2MQ150D Rev. A 10/23/07
Page 12