SM89516 Datasheet, PDF (9/19 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller With 64KB flash & 1KB RAM embedded

SyncMOS Technologies International, Inc.
Extension Function Description
3.Watch Dog Timer
SM89516
8-Bits Micro-controller
With 64KB flash & 1KB RAM embedded
The Watch Dog Timer (WDT) is a 16-bit free-running counter that generate reset signal if the counter overflows. The
WDT is useful for systems which are susceptible to noise, power glitches, or electronics discharge which causing
software dead loop or runaway. The WDT function can help user software recover form abnormal software condition.
The WDT is different from Timer0, Timer1 and Timer2 of general 8052. To prevent a WDT reset can be done by
software periodically clearing the WDT counter.
The SM89516 WDT has selectable divider input for the time base source clock. To select the divider input, the setting
of bit2~bit0 (PS2~PS0) OF Watch Dog Timer Control Register (WDTC) should be set accordingly.
The WDT is enable by setting 1 to the bit 7 (WDTE) of WDTC. After WDTE set to 1, the 16-bit counter starts to count
with the selected time base source clock which set by PS2~PS0. It will generate a reset signal when overflows. The
WDTE bit will be cleared to 0 automatically when SM89516 been reset, either hardware reset or WDT reset.
To reset the WDT is done by setting 1 to the bit 5 (CLEAR) of WDTC. This will clear the content of the 16-bit counter
and let the counter re-start to count from the beginning.
3.1 Watch Dog Timer Registers: WDT Control Register (WDTC, $9F)
bit-7
bit-0
WDTE
R
Read / Write:
R/W
-
Reset value:
0
*
Clear Unused Unused
PS2
PS1
PS0
R/W
-
-
R/W
R/W
R/W
0
*
*
0
0
0
WDTE : Watch Dog Timer enable bit
CLEAR : Watch Dog Timer reset bit
PS2~PS0 : clock source divider selection bit
PS [2:0]
000
001
010
011
100
101
110
111
Divider (OSC in)
8
16
32
64
128
256
512
1024
Time Period (ms) @40MHz
13.1
26.21
52.42
104.8
209.71
419.43
838.86
1677.72
4. Reduce EMI Function
The SM89516 allows user to reduce the EMI emission by setting 1 to the bit 0 (ALEI) of SCONF register. This function
will inhibit the clock signal in Fosc/6Hz output to the ALE pin. This function is available when there is no external
program memory or no external data RAM in the system.
Specifications subject to change without notice contact your sales representatives for the most recent information.
Ver 2.1 SM89516 08/2006
9