SM89S16R1_06 Datasheet, PDF (13/29 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller With 64KB Flash ROM & 1KB RAM & RTC & ADC & PWM & PDWU embedded

SyncMOS Technologies International, Inc.
SM89S16R1
8-Bits Micro-controller
With 64KB Flash ROM & 1KB RAM & RTC & ADC & PWM & PDWU embedded
Function Description
The SM89S16R1 is a stand-alone high-performance microcontroller designed for use in many applications, such as
LCD monitor, instrumentation, or high-end consumer applications.
In addition to the 80C51 standard functions, the device provides a number of dedicated hardware functions for these
applications.
The SM89S16R1 is a control-oriented CPU with on-chip program and data memory. It can be extended with external
data memory up to 64K bytes. For system requiring extra capability, the SM89S16R1 can be enhanced by using
external memory and peripherals.
The SM89S16R1 has two software selectable modes of saving power consumption：IDLE and POWER-DOWN. The
IDLE mode freezes the CPU while allowing the RAM, timer, serial ports and interrupt system to continue functioning.
The POWER-DOWN mode save the RAM contents but freezes the oscillator causing all other chip functions to be
inoperative. The POWER-DOWN mode can be terminated by H/W reset, or by any one of the two external interrupt
or RTCI function.
CPU
The CPU of SM89S16R1 is compatible to standard 80C51. The structure of this CPU is shown as FIGURE 11. It
contains Instruction Register (IR), Instruction Decoder, and Program Counter (PC), Accumulator (ACC), B Register,
and control logic. This CPU provides a 8-bits bi-direction bus to communicate with other blocks in the chip. The
address and data are transferred through on the same 8-bits bus.
IRQ
RES
Timing & Reset
CLK
CONTROL
LOGIC
TMP2
ACC
TMP1
PROG.
ADDR.
PROGRAM
ADDR.REGISTER
BUFFER
CTRL.
BUS
DATA
IN/OUT
INSTRUCTION
DECODER
INSTRUCTION
REGISTER
SP
B
Register
ALU
PSW
PCON
POWER CTRL.Signal
Figure 11 The CPU structure
PROGRAM
INCREMENT
PROGRAM
COUNTER
DPTR
CPU Timing
The machine cycle consists of a sequence of 6 states, numbered S1 through S6. Each state time lasts for two oscillator
periods. Thus a machine cycle takes 12 oscillator periods. Each state is divided into a PHASE 1 half and a PHASE2
half. FIGURE 12 Shows relationships between oscillator, phase, and S1-S6.
Specifications subject to change without notice contact your sales representatives for the most recent information.
Ver 2.1 SM89S16R1 08/2006
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