SM8958A Datasheet, PDF (10/25 Pages) SyncMOS Technologies,Inc – 8 - Bit Micro-controller with 32KB flash & 1KB RAM embedded

SyncMOS Technologies Inc.
September 2002
SM8958A
OME : 768 bytes on-chip RAM enable bit. The bit 0 (OME) of SCONF can enable or disable the on-chip expanded 768
byte RAM. The default setting of OME bit is 0 (disable).
ALEI : ALE output inhibit bit, to reduce EMI. Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz output
to the ALE pin.
1.4 I/O Pin Configuration
The ports 1, 2 and 3 of standard 8051 have internal pull-up resistor, and port 0 has open-drain outputs. Each I/O pin can
be used independently as an input or an output. For I/O ports to be used as an input pin, the port bit latch must contain a
‘1’ which turns off the output driver FET. Then for port 1, 2 and 3 port pin is pulled high by a weak internal pull-up, and can
be pulled low by an external source. The port 0 has open-drain outputs which means its pull-ups are not active during nor-
mal port operation. Writing ‘1’ to the port 0 bit latch will causing bit floating so that it can be used as a high-impedance
input.
The port 4 used as GPIO will has the same function as port 1, 2 and 3.
output
data
input
data
port 0
pin _{standard 8051}
output
data
input
data
port 1, 2 and 3
standard 8051
pin
2. Port 4 for PLCC or QFP package :
The bit addressable port 4 is available with PLCC or QFP package. The port 4 has only 4 pins and its port address is located
at 0D8H. The function of port 4 is the same as the function of port 1, port 2 and port 3.
Port4 (P4, $D8)
Read :
Write :
Reset value :
bit-7
Unused
*
Unused
*
Unused
*
Unused
*
P4.3
1
P4.2
1
P4.1
1
bit-0
P4.0
1
The bit 3, bit 2, bit 1, bit 0 output the setting to pin P4.3, P4.2, P4.1, P4.0 respectively.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
10/25
Ver 1.0 PID 8958A 09/02