HV7355_14 Datasheet, PDF (4/8 Pages) Supertex, Inc – Eight Channel, High Speed, Unipolar, Ultrasound Pulser 1.5A 150V

HV7355
Electrical Characteristics
(Operating conditions, unless otherwise specified, V_LL = +3.3V, V_ADD = V_DD = +5.0V, V_SS = -5.0V ,V_PP = +150V, T_A = 25°C)
P-Channel MOSFET Output, TX0~7
Sym Parameter
Min
Typ
Max Units Conditions
I_OUT Output saturation current
R_ON Channel resistance
I_OUT Output saturation current
R_ON Channel resistance
1.4
1.6
-
8.0
0.5
-
-
18
-
A MC = 1
-
Ω 100mA
-
A MC = 0
-
Ω 100mA
N-Channel MOSFET Output, TX0~7
Sym Parameter
Min
Typ
Max Units Conditions
I_OUT Output saturation current
R_ON Channel resistance
I_OUT Output saturation current
R_ON Channel resistance
1.5
1.7
-
3.0
0.5
-
-
22
-
A MC = 1
-
Ω I_SD = 100mA
-
A MC = 0
-
Ω 100mA
AC Electrical Characteristics
(Operating conditions, unless otherwise specified, V_LL = +3.3V, V_ADD = V_DD = +5.0V, V_SS = -5.0V ,V_PP = +150V, T_A = 25°C)
Sym Parameter
Min
Typ
Max Units Conditions
t_inrf Input data rise/fall max time
-
-
10
ns ---
t_r
Output rise time
t_f
Output fall time
-
24
-
ns _{330pF//2.5kΩ load}
-
24
-
ns ^{see timing test diagram}
f_OUT Output frequency range
-
-
18
MHz 100Ω resistor load, V_PP = +90V
t_EN-ON Initial enable time
-
150
200
μs
2μF on each CPF pin
to 90% of V_CPF
t_EN-OFF Output disable time
-
2.0
5.0
μs at 5.0MHz CW
t_dr Delay time on inputs rise
t_df Delay time on inputs fall
t_dm Delay on mode change
-
5.0
-
ns _{VPP = 25V}
-
5.0
-
ns 1.0Ω resistor load, 50% to 50%
-
50
70
ns ^{see timing test diagram}
Δt_DELAY Delay time matching
-
± 2.0
-
ns P to N, channel to channel
t_j
Delay jitter on rise or fall
-
15
-
ps ---
Serial Data Interface Timing Characteristics
(Operating conditions, unless otherwise specified, V_LL = +3.3V, V_ADD = V_DD = +5.0V, V_SS = -5.0V ,V_PP = +150V, T_A = 25°C)
Sym Parameter
Min
Typ
Max Units Conditions
f_SCK Serial clock max. frequency
25
-
t₁ SDI valid to SCK setup time
0
2.0
t₂ SDI valid to SCK hold time
4.0
-
t₃
SCK high time
9.0
-
t₄
SCK low time
9.0
-
t₅
CS pulse width
9.0
-
t₆ SCK high to CS high
7.0
-
t₇
CS low to SCK high
7.0
-
t₈ SDO delay from SCK rise edge
-
6.5
t₉ CS high to SCK rise edge
7.0
-
t₁₀ SCK high to LE low
7.0
-
-
MHz
-
ns
-
ns
-
ns _{All from/to 50% rise or fall edges}
-
ns ^{(See timing diagram)}
-
ns
-
ns
-
ns
-
ns SDO with 100pF to GND
-
ns _{All from/to 50% rise or fall edges}
-
ns ^{(See timing diagram)}
Doc.# DSFP-HV7355
D011314
Supertex inc.
4
www.supertex.com