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LR745N3-G Datasheet, PDF (3/7 Pages) Supertex, Inc – High Input Voltage SMPS Start-up
LR745
Block Diagram Detailed Description
The Supertex LR745 is a high voltage, switch-mode pow-
er supply start-up circuit which has 3 terminals: VIN, GND,
and VOUT. An input voltage range of 35 - 450VDC can be
applied directly at the input VIN pin. The output voltage, VOUT,
is monitored by the 2 comparators, COMP1 and COMP2.
An internal reference, VREF, and resistor divider R1, R2, and
R3 set the nominal VOUT trip points of 7.0V for COMP1 and
13.25V for COMP2.
When a voltage is applied on VIN, VOUT will start to ramp up
from 0V. When VOUT is less than 7.0V, the output of COMP1
will be at a logic high state, keeping the D flip flop in a re-
set state. The output of the D flip flop, Q, will be at logic
low keeping transistor M2 off. The data input for the D flip
flop, D, is internally connected to a logic high. As VOUT be-
comes greater than 7.0V, COMP1 will change to a logic low
state. VOUT will continue to increase, and the constant cur-
rent source of typically 3.0mA output will charge an external
storage capacitor. As VOUT reaches above 13.25V, the output
of COMP2 will then switch from a logic high to a logic low
state. The D flip flop’s output does not change state since its
clock input is designed to trigger only on a rising edge, logic
low to logic high transition. When there is no load connected
to the output, the output voltage will continue to increase
until it reaches 21.5V, which is the zener voltage minus the
threshold voltage of transistor M1. The zener voltage is typi-
cally 23V, and the threshold voltage of M1 is typically 1.5V.
The zener diode is biased by resistor R4.
VOUT will start to decrease when it is connected to an exter-
nal load greater than the internal constant current source,
which is the case when the PWM IC starts up. When VOUT
falls below 13.25V, the output of COMP2 will switch from a
logic low to a logic high. The output of COMP2 will clock in a
logic 1 into the D flip flop, causing the D flip flop’s output, Q,
to switch from a logic low to a logic high. Transistor M2 will
then be turned on pulling the gate of transistor M1 to ground,
thereby turning transistor M1 off. Transistor M1 will remain
off as long as VOUT is greater than 7.0V. Once VOUT decreases
below 7.0V, COMP1 will reset the D flip flop, thereby turning
transistor M2 off and transistor M1 back on.
Typical Application
Figure 1 shows a simplified typical configuration of a switch-
mode power supply, SMPS, using the Supertex LR745 in the
start-up circuit.
The LR745’s VOUT terminal is connected to the VCC line of a
PWM IC, Unitrode part #UC3844. An auxiliary winding on
the transformer is used to generate a VCC voltage to pow-
er the PWM IC after start-up. The LR745 is used to supply
power for the PWM IC only during start-up. After start-up, the
LR745 turns off and the auxiliary winding is used to supply
power for the PWM IC. Figure 2 shows the typical current
and voltage waveforms at various stages from power up to
operation powered by the auxiliary winding.
Stage I
Once a voltage is applied on VIN, the LR745 will start to
charge the VCC capacitor, C1. The VCC voltage will start to
increase at a rate limited by the internal current limiter of
3.0mA. The PWM IC is in its start-up condition and will typi-
cally draw 0.5mA from the VCC line. The VCC voltage will con-
tinue to increase until it reaches the PWM IC’s start thresh-
old voltage of typically 16V.
Stage II
Once VCC reaches 16V, the PWM IC is in its operating condi-
tion and will draw typically 20mA, depending on the operat-
ing frequency and size of the switching MOSFET. The output
of the LR745, VOUT, is internally current limited to 3.0mA. The
remaining 17mA will be supplied by C1 causing the VCC volt-
age decrease. When VCC decreases to 13.25V, the LR745
will turn off its output, thereby reducing its input current from
3.0mA to 10s of microamperes. At this point, all 20mA will be
supplied by C1. The PWM IC can now operate to a minimum
VCC voltage of typically 10V.
Once the switching MOSFET starts operating, the energy in
the primary winding is transferred to the secondary outputs
and the auxiliary winding, thereby building up VAUX. It is nec-
essary to size the VCC storage capacitor, C1, such that VAUX
increases to a voltage greater than 10V before VCC decreas-
es to 10V. This allows VAUX to supply the required operating
current for the PWM IC.
If for some reason the auxiliary voltage does not reach 10V,
VCC will continue to decrease. Once VCC goes below 10V,
the PWM IC will return to its start-up condition. The PWM
IC will now only draw 0.5mA. VCC will continue to decrease
but at a much slower rate. Once VCC decreases below 7.0V,
the LR745 will turn the output, VOUT, back on. VOUT will start
charging C1 as described in Stage I.
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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