English
Language : 

VN4012_13 Datasheet, PDF (2/3 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FET
◁
Thermal Characteristics
Package
ID
(continuous)†
TO-92
160mA
Notes:
† ID (continuous) is limited by max rated Tj .
ID
(pulsed)
650mA
Power Dissipation
@TC = 25OC
1.0W
IDR†
160mA
VN4012
IDRM
650mA
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
400 -
-
V VGS = 0V, ID = 100µA
VGS(th) Gate threshold voltage
0.6 -
1.8
V VGS = VDS, ID = 1.0mA
IGSS Gate body leakage
-
-
10
nA VGS = ±20V, VDS = 0V
IDSS Zero gate voltage drain current
ID(ON) On-state drain current
-
-
1
-
- 100
0.15 0.3 -
VGS = 0V, VDS = 0.8 Max Rating
µA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
A VGS = 4.5V, VDS = 10V
RDS(ON)
Static drain-to-source on-state
resistance
- 9.5 12
- 17 30
Ω
VGS = 4.5V, ID = 100mA
VGS = 4.5V, ID = 100mA, TA = 125OC
GFS Forward transductance
125 350
- mmho VDS = 15V, ID = 100mA
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
-
- 110
VGS = 0V,
-
-
30
pF VDS = 25V,
-
-
10
f = 1.0MHz
tr
td(ON)
tf
td(OFF)
Rise time
Turn-on delay time
Fall time
Turn-off delay time
-
-
20
-
-
20
VDD = 25V,
-
-
65
ns ID = 100mA,
RGEN = 25Ω
-
-
65
VSD Diode forward voltage drop
-
-
1.2
V VGS = 0V, ISD = 160mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
10%
0V
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tf
VDD
OUTPUT
0V
10%
90%
10%
90%
Pulse
Generator
RGEN
INPUT
VDD
RL
OUTPUT
D.U.T.
Doc.# DSFP-VN4012
B082013
Supertex inc.
2
www.supertex.com
 ▷