TN2124 Datasheet, PDF (2/4 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FETs

Thermal Characteristics
Package
TO-236AB
I_D (continuous)*
134mA
I_D (pulsed)
250mA
Power Dissipation
@ T_A = 25°C
0.36W
TO-243AA
230mA
1.1A
1.6W^†
* I_D (continuous) is limited by max rated T_j.
† _{Mounted on FR5 board. 25mmx25mmx1.57mm. Significant PD increase possible on ceramic substrate.}
θ_jc
°C/W
200
15
TN2124
θ_ja
°C/W
350
78^†
I_DR*
134mA
230mA
I_DRM
250mA
1.1A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol
Parameter
Min Typ Max Unit
BV_DSS
V_GS(th)
∆V_GS(th)
I_GSS
I_DSS
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Change in V_GS(th) with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
240
V
0.8
2.0
V
-5.5 mV/°C
0.1 100
nA
1
µA
100
µA
I_D(ON)
R_DS(ON)
ON-State Drain Current
Static Drain-to-Source
ON-State Resistance
140
30
15
∆R_DS(ON) Change in R_DS(ON) with Temperature
0.7
1.0
G_FS
Forward Transconductance
100 170
C_ISS
Input Capacitance
38
50
C_OSS
Common Source Output Capacitance
9
15
C_RSS
Reverse Transfer Capacitance
3
5
t_d(ON)
Turn-ON Delay Time
4
7
t_r
Rise Time
2
5
t_d(OFF)
Turn-OFF Delay Time
7
10
t_f
Fall Time
9
12
V_SD
Diode Forward Voltage Drop
1.8
t_rr
Reverse Recovery Time
400
Notes:
1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
mA
Ω
Ω
%/°C
m
pF
ns
V
ns
Conditions
I_D = 1mA, V_GS = 0V
V_GS = V_DS, I_D = 1mA
I_D = 1mA, V_GS = V_DS
V_GS = ±20V, V_DS = 0V
V_GS = 0V, V_DS = Max Rating
V_GS = 0V, V_DS = 0.8 Max Rating
T_A = 125°C
V_GS = 4.5V, V_DS = 25V
V_GS = 3V, I_D = 25mA
V_GS = 4.5V, I_D = 120mA
I_D = 120mA, V_GS = 4.5V
V_DS = 25V, I_D = 120mA
V_GS = 0V, V_DS = 25V, f = 1MHz
V_DD = 25V
I_D = 140mA
R_GEN = 25Ω
I_SD = 120mA, V_GS = 0V
I_SD = 120mA, V_GS = 0V
Switching Waveforms and Test Circuit
10V
INPUT
0V
10%
V_DD
OUTPUT
0V
t_(ON)
t_d(ON)
t_r
10%
90%
90%
t_(OFF)
t_d(OFF)
t_F
10%
90%
2
PULSE
GENERATOR
R_gen
INPUT
V_DD
R_L
OUTPUT
D.U.T.