VP0550N3-G Datasheet, PDF (1/5 Pages) Supertex, Inc – P-Channel Enhancement-Mode Vertical DMOS FETs

Supertex inc.
VP0550
P-Channel Enhancement-Mode
Vertical DMOS FETs
Features
►► Free from secondary breakdown
►► Low power drive requirement
►► Ease of paralleling
►► Low C_ISS and fast switching speeds
►► High input impedance and high gain
►► Excellent thermal stability
►► Integral source-to-drain diode
Applications
►► Motor controls
►► Converters
►► Amplifiers
►► Switches
►► Power supply circuits
►► Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
General Description
The Supertex VP0550 is an enhancement-mode (normally-
off) transistor that utilizes a vertical DMOS structure and
Supertex’s well-proven silicon-gate manufacturing process.
This combination produces a device with the power handling
capabilities of bipolar transistors, and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free from
thermal runaway and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Device
Package
TO-92
NW
(Die in wafer form)
Wafer / Die Options
NJ
(Die on adhesive tape)
VP0550
VP0550N3-G
VP1550NW
VP1550NJ
For packaged products, -G indicates package is RoHS compliant (‘Green’). Devices in Wafer / Die form are RoHS compliant (‘Green’).
Refer to Die Specification VF15 for layout and dimensions.
ND
(Die in waffle pack)
VP1550ND
Product Summary
Pin Configuration
Device
VP0550N3-G
BV_DSS/BV_DGS
(V)
-500
R_DS(ON)
(max)
(Ω)
125
I_D(ON)
(min)
(mA)
-100
SOURCE
DRAIN
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BV_DSS
BV_DGS
±20V
Operating and storage temperature
-55°C to +150°C
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability. All voltages are referenced to device ground.
GATE
TO-92 (N3)
Product Marking
SiVP _{YY = Year Sealed}
0 5 5 0 _{WW = Week Sealed}
YYWW
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92 (N3)
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: [phone] ● www.supertex.com