VP0535 Datasheet, PDF (1/4 Pages) Supertex, Inc – P-Channel Enhancement-Mode Vertical DMOS FETs

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OBSOLETE
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VP0535
VP0540
P-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BV_DSS /
BV_DGS
-350V
-400V
† _{MIL visual screening available}
R_DS(ON)
(max)
75Ω
75Ω
I_D(ON)
(min)
-200mA
-200mA
High Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process
Flows and Ordering Information.
Features
■ Free from secondary breakdown
■ Low power drive requirement
■ Ease of paralleling
■ Low C_ISS and fast switching speeds
■ Excellent thermal stability
■ Integral Source-Drain diode
■ High input impedance and high gain
■ Complementary N- and P-channel devices
Applications
■ Motor controls
■ Converters
■ Amplifiers
■ Switches
■ Power supply circuits
■ Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
TO-39
VP0535N2
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Order Number / Package
TO-92
VP0535N3
VP0540N3
Die^†
VP0535ND
VP0540ND
7
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
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devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
BV_DSS
BV_DGS
± 20V
-55°C to +150°C
300°C
7-237
DGS
TO-39
Case: DRAIN
SGD
TO-92
Note: See Package Outline section for dimensions.