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| TP2522_13 Datasheet, PDF (1/5 Pages) Supertex, Inc – P-Channel Enhancement-Mode Vertical DMOS FET | |||
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Supertex inc.
TP2522
P-Channel Enhancement-Mode
Vertical DMOS FET
Features
âºâºLow threshold (-2.4V max.)
âºâºHigh input impedance
âºâºLow input capacitance (125pF max.)
âºâºFast switching speeds
âºâºLow on-resistance
âºâºFree from secondary breakdown
âºâºLow input and output leakage
Applications
âºâº Logic level interfaces - ideal for TTL and CMOS
âºâº Solid state relays
âºâº Battery operated systems
âºâº Photo voltaic drives
âºâº Analog switches
âºâº General purpose line drivers
âºâº Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertexâs
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertexâs vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Part Number
Package Option
Packing
TP2522N8-G
TO-243AA (SOT-89) 2000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
Package
TO-243AA (SOT-89)
θja
133OC/W
Product Summary
BVDSS/BVDGS
RDS(ON)
(max)
-220V
12Ω
Pin Configuration
DRAIN
VGS(th)
(max)
-2.4V
ID(ON)
(min)
-750mA
SOURCE
DRAIN
GATE
TO-243AA (SOT-89)
Product Marking
TP5CW
W = Code for week sealed
= âGreenâ Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89)
Doc.# DSFP-TP2522
C081413
Supertex inc.
www.supertex.com
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