TP2104N3-G Datasheet, PDF (1/6 Pages) Supertex, Inc – P-Channel Enhancement Mode Vertical DMOS FETs

TP2104
P-Channel Enhancement Mode
Vertical DMOS FETs
Features
► High input impedance and high gain
► Low power drive requirement
► Ease of paralleling
► Low C_ISS and fast switching speeds
► Excellent thermal stability
► Integral source-drain diode
► Free from secondary breakdown
Applications
► Logic level interfaces - ideal for TTL and CMOS
► Solid state relays
► Analog switches
► Power management
► Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Device
Package Options
TO-236AB (SOT-23)
TO-92
BV_DSS/BV_DGS
(V)
R_DS(ON)
(max)
(Ω)
TP2104
TP2104K1-G
TP2104N3-G
-40
6.0
-G indicates package is RoHS compliant (‘Green’)
Pin Configuration
V_GS(th)
(max)
(V)
-2.0
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BV_DSS
BV_DGS
±20V
Operating and storage temperature
-55°C to +150°C
Soldering temperature*
+300°C
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
DRAIN
DRAIN
SOURCE
SOURCE
GATE
TO-92 (N3)
GATE
TO-236AB (SOT-23) (K1)
Product Marking
SiTP _{YY = Year Sealed}
2 1 0 4 _{WW = Week Sealed}
YYWW
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92 (N3)
P1LW ^{W = Code for week sealed}
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-236AB (SOT-23) (K1)
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: [phone] ● www.supertex.com