English
Language : 

TN2106 Datasheet, PDF (1/4 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FETs
TN2106
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BVDSS /
BVDGS
60V
RDS(ON)
(max)
2.5Ω
VGS(th)
(max)
2.0V
Order Number / Package
TO-236AB*
TO-92
Die
TN2106K1 TN2106N3 TN2106ND
*Same as SOT-23. All units shipped on 3,000 piece carrier tape reels.
Product marking for SOT-23:
N1Lp
where p = 2-week alpha date code
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
High input impedance and high gain
Complementary N- and P-channel devices
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
± 20V
-55°C to +150°C
300°C
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Package Options
Drain
Gate
Source
TO-236AB
(SOT-23)
top view
SGD
TO-92
Note: See Package Outline section for dimensions.
7-71