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TN0702_13 Datasheet, PDF (1/5 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FET
Supertex inc.
TN0702
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
►► Low threshold - 1.6V max.
►► High input impedance
►► Low input capacitance - 130pF typical
►► Fast switching speeds
►► Low on-resistance guaranteed at VGS = 2, 3, and 5V
►► Free from secondary breakdown
►► Low input and output leakage
Applications
►► Logic level interfaces – ideal for TTL and CMOS
►► Solid state relays
►► Battery operated systems
►► Photo voltaic drives
►► Analog switches
►► General purpose line drivers
►► Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Product Summary
Part Number
Package Option
TN0702N3-G
TO-92
TN0702N3-G P002
Packing
1000/Bag
BVDSS/BVDGS
20V
RDS(ON)
(max)
1.3Ω
ID(ON)
(min)
0.5A
VGS(th)
(max)
1.0V
TN0702N3-G P003
TN0702N3-G P005 TO-92
2000/Reel Pin Configuration
TN0702N3-G P013
TN0702N3-G P014
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Absolute Maximum Ratings
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
SOURCE
DRAIN
Value
BVDSS
BVDGS
±20V
Product Marking
GATE
TO-92
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
SiTN YY = Year Sealed
0 7 0 2 WW = Week Sealed
YYWW
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92
Package
TO-92
θja
132OC/W
Doc.# DSFP-TN0702
C080813
Supertex inc.
www.supertex.com