TN0604_07 Datasheet, PDF (1/6 Pages) Supertex, Inc – N-Channel Enhancement-Mode Vertical DMOS FET

TN0604
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
General Description
► Low threshold — 1.6V max.
► High input impedance
► Low input capacitance — 140pF typical
► Fast switching speeds
► Low on-resistance
► Free from secondary breakdown
► Low input and output leakage
► Complementary N- and P-channel devices
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Applications
► Logic level interfaces – ideal for TTL and CMOS
► Solid state relays
► Battery operated systems
► Photo voltaic drives
► Analog switches
► General purpose line drivers
► Telecom switches
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
The Quad-Array package (20-Lead SOW (WG)) uses
four independent DMOS transistors which provide four
independent channels.
Ordering Information
BV_DSS/BV_DGS
(V)
R_DS(ON)
max
(Ω)
I_D(ON)
min
(A)
40
0.75
4.0
40
1.0
4.0
-G indicates package is RoHS compliant (‘Green’)
V_GS(th)
max
(V)
1.6
1.6
Package Options
TO-92
20-Lead SOW
TN0604N3-G
-
-
TN0604WG-G
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BV_DSS
BV_DGS
±20V
Operating and storage temperature -55^OC to +150^OC
Soldering temperature*
300^OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Product Marking
TN
0604
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
TO-92 (N3)
Pin Configurations
DRAIN
SOURCE
GATE
DRAIN₁
DRAIN₁
DRAIN₁
GATE₁
SOURCE₁
SOURCE₂
GATE₂
DRAIN₂
DRAIN₂
DRAIN₂
DRAIN₄
DRAIN₄
DRAIN₄
GATE₄
SOURCE₄
SOURCE₃
GATE₃
DRAIN₃
DRAIN₃
DRAIN₃
TO-92 (N3)
20-Lead SOW (WG)
Product Marking
Top Marking
YYWW
TN0604WG
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
20-Lead SOW (WG)