HV66_13 Datasheet, PDF (1/7 Pages) Supertex, Inc – 32-Channel LCD Driver with Separate Backplane Output

Supertex inc.
HV66
32-Channel LCD Driver
with Separate Backplane Output
Features
►►HVCMOS^® technology
►►32 push-pull CMOS output up to 60V
►►Low power level shifting
►►Shift register speed 5.0MHz
►►Latched data outputs
►►Bidirectional shift register (DIR)
►►Backplane output
General Description
The HV66 is a low voltage serial to high voltage parallel converter
with push-pull outputs. This device has been designed for use as
a driver circuit for LCD displays. It can also be used in any appli-
cation requiring multiple output high voltage current sourcing and
sinking capabilities. The inputs are fully CMOS compatible.
The device consists of a 32-bit shift register, 32 latches, and con-
trol logic to perform blanking and polarity control of the outputs.
HV_OUT1 is connected to the first stage of the shift register. Data is
shifted through the shift register on the logic rising transition of the
clock. A DIR pin causes data shifting clockwise when grounded
and counter clockwise when connected to VDD. A data output
buffer is provided for cascading devices. This output reflects the
current status of the last bit of the shift register. Operation of the
shift register is not affected by the LE (latch enable), BL (blank) or
the POL (polarity) inputs. Transfer of data from the shift register to
the latch occurs when the LE (latch enable) input is high. The data
in the latch is stored after LE transitions from high to low.
Functional Block Diagram
VPP
POL
BL
LE
VDD
DATA IN
Latch
HV_OUT1
CLK
32-Bit
DIR
Shift
Register
DATA OUT
GND
Latch
Latch
Latch
HV_OUT2
(Outputs 3 to 30
not shown)
HV_OUT31
HV_OUT32
BP_OUT
Doc.# DSFP-HV66
C070313
Supertex inc.
www.supertex.com