HV66_07 Datasheet, PDF (1/8 Pages) Supertex, Inc – 32-Channel LCD Driver with Separate Backplane Output

HV66
32-Channel LCD Driver
with Separate Backplane Output
Ordering Information
Device
HV66
44 Lead Quad
Plastic Gullwing
HV66PG
Package Options
44 J-Lead Quad
Plastic Chip Carrier
HV66PJ
Die
in waffle pack
HV66X
Features
Processed with HVCMOS^¨ technology
32 push-pull CMOS output up to 60V
Low power level shifting
Source/sink current minimum 1mA
Shift register speed 5MHz
Latched data outputs
Bidirectional shift register (DIR)
Backplane output
Absolute Maximum Ratings¹
Supply voltage, V_DD2
Output voltage, V_PP2
Logic input levels²
Ground current³
Continuous total power dissipation⁴
-0.5V to +7.0V
-0.5V to +70V
-0.5V to V_DD + 0.5V
1.5A
1200mW
Operating temperature range
Storage temperature range
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
-40°C to +85°C
-65°C to +125°C
260°C
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at
these extremes.
2. All voltages are referenced to V_SS.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25°C ambient derate linearly to 85°C at 20mW/°C.
General Description
The HV66 is a low-voltage serial to high-voltage parallel converter
with push-pull outputs. This device has been designed for use as
a driver circuit for LCD displays. It can also be used in any
application requiring multiple output high-voltage current sourc-
ing and sinking capabilities. The inputs are fully CMOS compat-
ible.
The device consists of a 32-bit shift register, 32 latches, and
control logic to perform blanking and polarity control of the
outputs. HV_OUT1 is connected to the first stage of the shift register.
Data is shifted through the shift register on the logic rising
transition of the clock. A DIR pin causes data shifting clockwise
when grounded and counterclockwise when connected to V_DD . A
data output buffer is provided for cascading devices. This output
reflects the current status of the last bit of the shift register.
Operation of the shift register is not affected by the LE (latch
enable), BL (blank) or the POL (polarity) inputs. Transfer of data
from the shift register to the latch occurs when the LE (latch
enable) input is high. The data in the latch is stored after LE
transitions from high to low.
09/30/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.