HV57708_13 Datasheet, PDF (1/7 Pages) Supertex, Inc – 32MHz, 64-Channel Serial to Parallel Converter with Push-Pull Outputs

Supertex inc.
HV57708
32MHz, 64-Channel Serial to Parallel Converter
with Push-Pull Outputs
Features
►►HVCMOS^® technology
►►5.0V CMS Logic
►►Output voltage up to +80V
►►Low power level shifting
►►32MHz equivalent data rate
►►Latched data outputs
►►Foreward and reverse shifting options (DIR pin)
►►Diode to VPP allows efficient power recovery
►►Outputs may be hot switched
General Description
The HV57708 is a low voltage serial to high voltage parallel
converter with push-pull outputs. The device has been
designed for use as a driver for EL displays. It can also be
used in any application requiring multiple output high voltage
current sourcing and sinking capability such as driving
plasma panels, vacuum fluorescent displays, or large matrix
LCD displays.
The device has 4 parallel 16-bit registers, permitting data
rates 4x the speed of one (they are clocked together). There
are also 64 latches and control logic to perform the polarity
select and blanking of the outputs. HV_OUT1 is connected to
the first stage of the first shift register through the polarity
and blanking logic. Data is shifted through the shift registers
on the logic low to high transition of the clock. The DIR pin
causes CCW shifting when connected to GND, and CW
shifting when connected to VDD. A data output buffer is
provided for cascading devices. This output reflects the
current status of the last bit of the shift register (HV_OUT64).
Operation of the shift register is not affected by the LE (latch
enable), BL (blanking), or the POL (polarity) inputs. Transfer
of data from the shift registers to the latches occurs when
the LE input is high. The data in the latches is stored when
the LE is low.
Functional Block Diagram
D_O1 D_O2 D_O3 D_O4
D_I4 D_I3 D_I2 D_I1
VDD
LE
BL
POL
VPP
DIR
SR1
HV_OUT15
9
•
•
•
HV_OUT61
CLK
SR2
SR3
HV_OUT26
10
•
•
•
HV_OUT62
HV_OUT37
11
•
•
•
HV_OUT63
SR4
HV_OUT48
12
•
•
•
HV_OUT64
Doc.# DSFP-HV57708
A061913
Note:
D_O4
D_I1
D_O3
D_I2
D_O2
D_I3
D_O1
D_I4
GND
Each SR (shift register) provides 16 outputs. SR1 supplies every fourth output starting with 1;
SR2 supplies every fourth output with 2, etc.
Supertex inc.
www.supertex.com