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HV574 Datasheet, PDF (1/5 Pages) Supertex, Inc – 100 MHz, 80-Channel Serial To Parallel Converter With Push-Pull Outputs
HV574
100 MHz, 80-Channel Serial To Parallel Converter
With Push-Pull Outputs
Ordering Information
Device
Package Options
100 Lead Quad
Plastic Gullwing
Die
HV574
HV574PG
HV574X
Features
❏ Processed with HVCMOS® technology
❏ 5V CMOS logic
❏ Output voltages up to 80V
❏ Low power level shifting
❏ 100MHz equivalent data rate using four dynamic
shift registers
❏ Static latched data outputs
❏ Forward and reverse shifting options (DIR pin)
❏ Diode to VPP allows efficient power recovery
❏ Outputs may be hot switched
❏ Hi-Rel processing available
Absolute Maximum Ratings
Supply voltage, VDD1
Output voltage, VPP1
Logic input levels1
Ground current 2
-0.5V to +7.5V
-0.5V to +90V
-0.3V to VDD +0.3V
1.5A
Continuous total power dissipation 3
1200mW
Operating temperature range
-40 to 85°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
260°C
Notes:
1. All voltages are referenced to GND.
2. Limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to 85°C at 20mW/°C.
General Description
The HV574 is a low-voltage serial to high-voltage parallel con-
verter with push-pull outputs. This device has been designed for
use as a driver for printer applications. It can also be used in any
application requiring multiple output high-voltage current sour-
cing and sinking capability such as driving plasma panels, vac-
uum fluorescent displays, or large matrix LCD displays.
The device has 4 parallel 20-bit dynamic shift registers, permitting
data rates 4X the speed of one ( they are clocked together).
There are 80 static latches and control logic to perform the polarity
select and blanking of the outputs. HVOUT1 is connected to the first
stage of the first shift register through the polarity and blanking
logic. Data is shifted through the shift registers on the logic low to
high transition of the clock. The DIR pin causes CCW shifting
when connected to GND, and CW shifting when connected to
VDD. A data output buffer is provided for cascading devices. This
output reflects the current status of the last bit of the shift register
(HVOUT80). Operation of the shift register is not affected by the LE
(latch enable), BL (blanking), or the POL (polarity) inputs. Trans-
fer of data from the shift registers to the latches occurs when the
LE (latch enable) input is high. The data in the latches is stored
when LE is low.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex pro1ducts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.