HV57009 Datasheet, PDF (1/7 Pages) Supertex, Inc – 64-Channel Serial To Parallel Converter With P-Channel Open Drain Controllable Output Current

HV57009
64-Channel Serial To Parallel Converter
With P-Channel Open Drain Controllable Output Current
Ordering Information
Device
80-Lead Quad
Ceramic Gullwing
Package Options
80 Lead Quad
Die
Plastic Gullwing
80 Lead Quad
Ceramic Gullwing
(MIL-Std-833 Processed*)
HV57009
HV57009DG
* For Hi-Rel process flows, refer to page 5-3 of the Databook.
HV57009PG
Features
❏ Processed with HVCMOS^® technology
❏ 5V CMOS Logic
❏ Output voltage up to -85V
❏ Output current source control
❏ 16MHz equivalent data rate
❏ Latched data outputs
❏ Forward and reverse shifting options (DIR pin)
❏ Diode to V_DD allows efficient power recovery
❏ Hi-Rel processing available
Absolute Maximum Ratings
Supply voltage, V_DD1
Output Voltage, V_NN1
Logic input levels¹
Ground Current²
-0.5V to +7.5V
V_DD + 0.5V to -95V
-0.3V to V_DD +0.3V
1.5A
Continuous total power dissipation³ Plastic
Ceramic
1200mW
1900mW
Operating temperature range
Plastic -40°C to +85°C
Ceramic -55°C to +125°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
260°C
Notes:
1. All voltages are referenced to V_SS.
2. Limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 19mW/°C for ceramic.
HV57009X
RBHV57009DG
General Description
The HV570 is a low-voltage serial to high-voltage parallel con-
verter with P-channel open drain outputs. This device has been
designed for use as a driver for plasma panels.
The device has two parallel 32-bit shift registers, permitting data
rate twice the speed of one (they are clocked together). There
are also 64 latches and control logic to perform the blanking of
the outputs. HV_OUT1 is connected to the first stage of the first shift
register through the blanking logic. Data is shifted through the
shift registers on the logic low to high transition of the clock. The
DIR pin causes CCW shifting when connected to V_SS, and CW
shifting when connected to V . A data output buffer is provided
DD
for cascading devices. This output reflects the current status of
the last bit of the shift register (HV_OUT64). Operation of the shift
register is not affected by the LE (latch enable), or the BL
(blanking) inputs. Transfer of data from the shift registers to
latches occurs when the LE input is high. The data in the latches
is stored when LE is low.
The HV570 has 64 channels of output constant current sourcing
capability. They are adjustable from 0.1 to 2.0mA through one
external resistor or a current source.
03/12/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod₁ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.